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| author | 2021-05-26 18:42:37 -0300 | |
|---|---|---|
| committer | 2021-07-22 21:51:33 -0400 | |
| commit | 8f3043c3cf6f6baa1d235e6789533fbf567d1c2d (patch) | |
| tree | e9c017011fe7578f3b243d01badc7c8faa21da1b /src/shader_recompiler | |
| parent | glasm: Remove unintentional '\n' on Undef32 (diff) | |
| download | yuzu-8f3043c3cf6f6baa1d235e6789533fbf567d1c2d.tar.gz yuzu-8f3043c3cf6f6baa1d235e6789533fbf567d1c2d.tar.xz yuzu-8f3043c3cf6f6baa1d235e6789533fbf567d1c2d.zip | |
Revert "glasm: Skip phi moves on undefined instructions"
Causes regressions on Bowser's Fury.
Diffstat (limited to '')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp | 4 | ||||
| -rw-r--r-- | src/shader_recompiler/frontend/ir/value.h | 13 |
2 files changed, 1 insertions, 16 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp index e6a880a36..95bcbd750 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp | |||
| @@ -58,9 +58,7 @@ void EmitPhiMove(EmitContext& ctx, const IR::Value& phi_value, const IR::Value& | |||
| 58 | } | 58 | } |
| 59 | const Register phi_reg{ctx.reg_alloc.Consume(IR::Value{&phi})}; | 59 | const Register phi_reg{ctx.reg_alloc.Consume(IR::Value{&phi})}; |
| 60 | const Value eval_value{ctx.reg_alloc.Consume(value)}; | 60 | const Value eval_value{ctx.reg_alloc.Consume(value)}; |
| 61 | if (!value.IsImmediate() && IR::IsUndef(RegAlloc::AliasInst(*value.Inst()))) { | 61 | |
| 62 | return; | ||
| 63 | } | ||
| 64 | if (phi_reg == eval_value) { | 62 | if (phi_reg == eval_value) { |
| 65 | return; | 63 | return; |
| 66 | } | 64 | } |
diff --git a/src/shader_recompiler/frontend/ir/value.h b/src/shader_recompiler/frontend/ir/value.h index 090cc1739..0c6bf684d 100644 --- a/src/shader_recompiler/frontend/ir/value.h +++ b/src/shader_recompiler/frontend/ir/value.h | |||
| @@ -395,17 +395,4 @@ inline f64 Value::F64() const { | |||
| 395 | return inst.GetOpcode() == Opcode::Phi; | 395 | return inst.GetOpcode() == Opcode::Phi; |
| 396 | } | 396 | } |
| 397 | 397 | ||
| 398 | [[nodiscard]] inline bool IsUndef(const Inst& inst) { | ||
| 399 | switch (inst.GetOpcode()) { | ||
| 400 | case Opcode::UndefU1: | ||
| 401 | case Opcode::UndefU8: | ||
| 402 | case Opcode::UndefU16: | ||
| 403 | case Opcode::UndefU32: | ||
| 404 | case Opcode::UndefU64: | ||
| 405 | return true; | ||
| 406 | default: | ||
| 407 | return false; | ||
| 408 | } | ||
| 409 | } | ||
| 410 | |||
| 411 | } // namespace Shader::IR | 398 | } // namespace Shader::IR |