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| author | 2021-04-03 01:48:39 +0200 | |
|---|---|---|
| committer | 2021-07-22 21:51:26 -0400 | |
| commit | baec84247fe815199595d9e8077b71f3b5c8317e (patch) | |
| tree | 84195625ffb43922ba87b25296057bdeb9f22a2c /src/shader_recompiler/frontend | |
| parent | shader: Implement SR_LaneId (diff) | |
| download | yuzu-baec84247fe815199595d9e8077b71f3b5c8317e.tar.gz yuzu-baec84247fe815199595d9e8077b71f3b5c8317e.tar.xz yuzu-baec84247fe815199595d9e8077b71f3b5c8317e.zip | |
shader: Address Feedback
Diffstat (limited to 'src/shader_recompiler/frontend')
7 files changed, 25 insertions, 80 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp index b5f61956a..5e94edd74 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp +++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp | |||
| @@ -82,8 +82,17 @@ void IREmitter::SelectionMerge(Block* merge_block) { | |||
| 82 | Inst(Opcode::SelectionMerge, merge_block); | 82 | Inst(Opcode::SelectionMerge, merge_block); |
| 83 | } | 83 | } |
| 84 | 84 | ||
| 85 | void IREmitter::MemoryBarrier(BarrierInstInfo info) { | 85 | void IREmitter::MemoryBarrier(MemoryScope scope) { |
| 86 | Inst(Opcode::MemoryBarrier, Flags{info}); | 86 | switch (scope) { |
| 87 | case MemoryScope::Workgroup: | ||
| 88 | Inst(Opcode::MemoryBarrierWorkgroupLevel); | ||
| 89 | case MemoryScope::Device: | ||
| 90 | Inst(Opcode::MemoryBarrierDeviceLevel); | ||
| 91 | case MemoryScope::System: | ||
| 92 | Inst(Opcode::MemoryBarrierSystemLevel); | ||
| 93 | default: | ||
| 94 | throw InvalidArgument("Invalid memory scope {}", scope); | ||
| 95 | } | ||
| 87 | } | 96 | } |
| 88 | 97 | ||
| 89 | void IREmitter::Return() { | 98 | void IREmitter::Return() { |
| @@ -202,38 +211,6 @@ void IREmitter::SetOFlag(const U1& value) { | |||
| 202 | Inst(Opcode::SetOFlag, value); | 211 | Inst(Opcode::SetOFlag, value); |
| 203 | } | 212 | } |
| 204 | 213 | ||
| 205 | U1 IREmitter::GetFCSMFlag() { | ||
| 206 | return Inst<U1>(Opcode::GetFCSMFlag); | ||
| 207 | } | ||
| 208 | |||
| 209 | U1 IREmitter::GetTAFlag() { | ||
| 210 | return Inst<U1>(Opcode::GetTAFlag); | ||
| 211 | } | ||
| 212 | |||
| 213 | U1 IREmitter::GetTRFlag() { | ||
| 214 | return Inst<U1>(Opcode::GetTRFlag); | ||
| 215 | } | ||
| 216 | |||
| 217 | U1 IREmitter::GetMXFlag() { | ||
| 218 | return Inst<U1>(Opcode::GetMXFlag); | ||
| 219 | } | ||
| 220 | |||
| 221 | void IREmitter::SetFCSMFlag(const U1& value) { | ||
| 222 | Inst(Opcode::SetFCSMFlag, value); | ||
| 223 | } | ||
| 224 | |||
| 225 | void IREmitter::SetTAFlag(const U1& value) { | ||
| 226 | Inst(Opcode::SetTAFlag, value); | ||
| 227 | } | ||
| 228 | |||
| 229 | void IREmitter::SetTRFlag(const U1& value) { | ||
| 230 | Inst(Opcode::SetTRFlag, value); | ||
| 231 | } | ||
| 232 | |||
| 233 | void IREmitter::SetMXFlag(const U1& value) { | ||
| 234 | Inst(Opcode::SetMXFlag, value); | ||
| 235 | } | ||
| 236 | |||
| 237 | static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) { | 214 | static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) { |
| 238 | switch (flow_test) { | 215 | switch (flow_test) { |
| 239 | case FlowTest::F: | 216 | case FlowTest::F: |
| @@ -292,9 +269,9 @@ static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) { | |||
| 292 | return ir.LogicalOr(ir.GetSFlag(), ir.GetZFlag()); | 269 | return ir.LogicalOr(ir.GetSFlag(), ir.GetZFlag()); |
| 293 | case FlowTest::RGT: | 270 | case FlowTest::RGT: |
| 294 | return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag())); | 271 | return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag())); |
| 295 | |||
| 296 | case FlowTest::FCSM_TR: | 272 | case FlowTest::FCSM_TR: |
| 297 | return ir.LogicalAnd(ir.GetFCSMFlag(), ir.GetTRFlag()); | 273 | // LOG_WARNING(ShaderDecompiler, "FCSM_TR CC State (Stubbed)"); |
| 274 | return ir.Imm1(false); | ||
| 298 | case FlowTest::CSM_TA: | 275 | case FlowTest::CSM_TA: |
| 299 | case FlowTest::CSM_TR: | 276 | case FlowTest::CSM_TR: |
| 300 | case FlowTest::CSM_MX: | 277 | case FlowTest::CSM_MX: |
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h index e034d672f..14b743975 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.h +++ b/src/shader_recompiler/frontend/ir/ir_emitter.h | |||
| @@ -70,16 +70,6 @@ public: | |||
| 70 | void SetCFlag(const U1& value); | 70 | void SetCFlag(const U1& value); |
| 71 | void SetOFlag(const U1& value); | 71 | void SetOFlag(const U1& value); |
| 72 | 72 | ||
| 73 | [[nodiscard]] U1 GetFCSMFlag(); | ||
| 74 | [[nodiscard]] U1 GetTAFlag(); | ||
| 75 | [[nodiscard]] U1 GetTRFlag(); | ||
| 76 | [[nodiscard]] U1 GetMXFlag(); | ||
| 77 | |||
| 78 | void SetFCSMFlag(const U1& value); | ||
| 79 | void SetTAFlag(const U1& value); | ||
| 80 | void SetTRFlag(const U1& value); | ||
| 81 | void SetMXFlag(const U1& value); | ||
| 82 | |||
| 83 | [[nodiscard]] U1 Condition(IR::Condition cond); | 73 | [[nodiscard]] U1 Condition(IR::Condition cond); |
| 84 | [[nodiscard]] U1 GetFlowTestResult(FlowTest test); | 74 | [[nodiscard]] U1 GetFlowTestResult(FlowTest test); |
| 85 | 75 | ||
| @@ -138,7 +128,7 @@ public: | |||
| 138 | [[nodiscard]] Value Select(const U1& condition, const Value& true_value, | 128 | [[nodiscard]] Value Select(const U1& condition, const Value& true_value, |
| 139 | const Value& false_value); | 129 | const Value& false_value); |
| 140 | 130 | ||
| 141 | [[nodiscard]] void MemoryBarrier(BarrierInstInfo info); | 131 | [[nodiscard]] void MemoryBarrier(MemoryScope scope); |
| 142 | 132 | ||
| 143 | template <typename Dest, typename Source> | 133 | template <typename Dest, typename Source> |
| 144 | [[nodiscard]] Dest BitCast(const Source& value); | 134 | [[nodiscard]] Dest BitCast(const Source& value); |
diff --git a/src/shader_recompiler/frontend/ir/modifiers.h b/src/shader_recompiler/frontend/ir/modifiers.h index 7730c25a9..2aa4ac79b 100644 --- a/src/shader_recompiler/frontend/ir/modifiers.h +++ b/src/shader_recompiler/frontend/ir/modifiers.h | |||
| @@ -25,13 +25,7 @@ enum class FpRounding : u8 { | |||
| 25 | RZ, // Round towards zero | 25 | RZ, // Round towards zero |
| 26 | }; | 26 | }; |
| 27 | 27 | ||
| 28 | enum class MemoryScope : u32 { | 28 | enum class MemoryScope : u32 { DontCare, Warp, Workgroup, Device, System }; |
| 29 | DontCare, | ||
| 30 | Warp, | ||
| 31 | Workgroup, | ||
| 32 | Device, | ||
| 33 | System | ||
| 34 | }; | ||
| 35 | 29 | ||
| 36 | struct FpControl { | 30 | struct FpControl { |
| 37 | bool no_contraction{false}; | 31 | bool no_contraction{false}; |
| @@ -40,11 +34,6 @@ struct FpControl { | |||
| 40 | }; | 34 | }; |
| 41 | static_assert(sizeof(FpControl) <= sizeof(u32)); | 35 | static_assert(sizeof(FpControl) <= sizeof(u32)); |
| 42 | 36 | ||
| 43 | union BarrierInstInfo { | ||
| 44 | u32 raw; | ||
| 45 | BitField<0, 3, MemoryScope> scope; | ||
| 46 | }; | ||
| 47 | |||
| 48 | union TextureInstInfo { | 37 | union TextureInstInfo { |
| 49 | u32 raw; | 38 | u32 raw; |
| 50 | BitField<0, 8, TextureType> type; | 39 | BitField<0, 8, TextureType> type; |
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc index 74e956930..3640a5d24 100644 --- a/src/shader_recompiler/frontend/ir/opcodes.inc +++ b/src/shader_recompiler/frontend/ir/opcodes.inc | |||
| @@ -17,7 +17,9 @@ OPCODE(Unreachable, Void, | |||
| 17 | OPCODE(DemoteToHelperInvocation, Void, Label, ) | 17 | OPCODE(DemoteToHelperInvocation, Void, Label, ) |
| 18 | 18 | ||
| 19 | // Barriers | 19 | // Barriers |
| 20 | OPCODE(MemoryBarrier, Void, ) | 20 | OPCODE(MemoryBarrierWorkgroupLevel, Void, ) |
| 21 | OPCODE(MemoryBarrierDeviceLevel, Void, ) | ||
| 22 | OPCODE(MemoryBarrierSystemLevel, Void, ) | ||
| 21 | 23 | ||
| 22 | // Special operations | 24 | // Special operations |
| 23 | OPCODE(Prologue, Void, ) | 25 | OPCODE(Prologue, Void, ) |
| @@ -49,18 +51,10 @@ OPCODE(GetZFlag, U1, Void | |||
| 49 | OPCODE(GetSFlag, U1, Void, ) | 51 | OPCODE(GetSFlag, U1, Void, ) |
| 50 | OPCODE(GetCFlag, U1, Void, ) | 52 | OPCODE(GetCFlag, U1, Void, ) |
| 51 | OPCODE(GetOFlag, U1, Void, ) | 53 | OPCODE(GetOFlag, U1, Void, ) |
| 52 | OPCODE(GetFCSMFlag, U1, Void, ) | ||
| 53 | OPCODE(GetTAFlag, U1, Void, ) | ||
| 54 | OPCODE(GetTRFlag, U1, Void, ) | ||
| 55 | OPCODE(GetMXFlag, U1, Void, ) | ||
| 56 | OPCODE(SetZFlag, Void, U1, ) | 54 | OPCODE(SetZFlag, Void, U1, ) |
| 57 | OPCODE(SetSFlag, Void, U1, ) | 55 | OPCODE(SetSFlag, Void, U1, ) |
| 58 | OPCODE(SetCFlag, Void, U1, ) | 56 | OPCODE(SetCFlag, Void, U1, ) |
| 59 | OPCODE(SetOFlag, Void, U1, ) | 57 | OPCODE(SetOFlag, Void, U1, ) |
| 60 | OPCODE(SetFCSMFlag, Void, U1, ) | ||
| 61 | OPCODE(SetTAFlag, Void, U1, ) | ||
| 62 | OPCODE(SetTRFlag, Void, U1, ) | ||
| 63 | OPCODE(SetMXFlag, Void, U1, ) | ||
| 64 | OPCODE(WorkgroupId, U32x3, ) | 58 | OPCODE(WorkgroupId, U32x3, ) |
| 65 | OPCODE(LocalInvocationId, U32x3, ) | 59 | OPCODE(LocalInvocationId, U32x3, ) |
| 66 | OPCODE(LaneId, U32, ) | 60 | OPCODE(LaneId, U32, ) |
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp index 933af572c..26d5e276b 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp | |||
| @@ -5,8 +5,8 @@ | |||
| 5 | #include "common/bit_field.h" | 5 | #include "common/bit_field.h" |
| 6 | #include "common/common_types.h" | 6 | #include "common/common_types.h" |
| 7 | #include "shader_recompiler/frontend/ir/modifiers.h" | 7 | #include "shader_recompiler/frontend/ir/modifiers.h" |
| 8 | #include "shader_recompiler/frontend/maxwell/translate/impl/impl.h" | ||
| 9 | #include "shader_recompiler/frontend/maxwell/opcodes.h" | 8 | #include "shader_recompiler/frontend/maxwell/opcodes.h" |
| 9 | #include "shader_recompiler/frontend/maxwell/translate/impl/impl.h" | ||
| 10 | 10 | ||
| 11 | namespace Shader::Maxwell { | 11 | namespace Shader::Maxwell { |
| 12 | namespace { | 12 | namespace { |
| @@ -21,28 +21,24 @@ enum class LocalScope : u64 { | |||
| 21 | IR::MemoryScope LocalScopeToMemoryScope(LocalScope scope) { | 21 | IR::MemoryScope LocalScopeToMemoryScope(LocalScope scope) { |
| 22 | switch (scope) { | 22 | switch (scope) { |
| 23 | case LocalScope::CTG: | 23 | case LocalScope::CTG: |
| 24 | return IR::MemoryScope::Warp; | 24 | return IR::MemoryScope::Workgroup; |
| 25 | case LocalScope::GL: | 25 | case LocalScope::GL: |
| 26 | return IR::MemoryScope::Device; | 26 | return IR::MemoryScope::Device; |
| 27 | case LocalScope::SYS: | 27 | case LocalScope::SYS: |
| 28 | return IR::MemoryScope::System; | 28 | return IR::MemoryScope::System; |
| 29 | case LocalScope::VC: | ||
| 30 | return IR::MemoryScope::Workgroup; // or should be device? | ||
| 31 | default: | 29 | default: |
| 32 | throw NotImplementedException("Unimplemented Local Scope {}", scope); | 30 | throw NotImplementedException("Unimplemented Local Scope {}", scope); |
| 33 | } | 31 | } |
| 34 | } | 32 | } |
| 35 | 33 | ||
| 36 | } // namespace | 34 | } // Anonymous namespace |
| 37 | 35 | ||
| 38 | void TranslatorVisitor::MEMBAR(u64 inst) { | 36 | void TranslatorVisitor::MEMBAR(u64 inst) { |
| 39 | union { | 37 | union { |
| 40 | u64 raw; | 38 | u64 raw; |
| 41 | BitField<8, 2, LocalScope> scope; | 39 | BitField<8, 2, LocalScope> scope; |
| 42 | } membar{inst}; | 40 | } membar{inst}; |
| 43 | IR::BarrierInstInfo info{}; | 41 | ir.MemoryBarrier(LocalScopeToMemoryScope(membar.scope)); |
| 44 | info.scope.Assign(LocalScopeToMemoryScope(membar.scope)); | ||
| 45 | ir.MemoryBarrier(info); | ||
| 46 | } | 42 | } |
| 47 | 43 | ||
| 48 | void TranslatorVisitor::DEPBAR() { | 44 | void TranslatorVisitor::DEPBAR() { |
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp index 731ac643f..7d9c42a83 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp | |||
| @@ -96,8 +96,10 @@ enum class SpecialRegister : u64 { | |||
| 96 | case SpecialRegister::SR_CTAID_Z: | 96 | case SpecialRegister::SR_CTAID_Z: |
| 97 | return ir.WorkgroupIdZ(); | 97 | return ir.WorkgroupIdZ(); |
| 98 | case SpecialRegister::SR_WSCALEFACTOR_XY: | 98 | case SpecialRegister::SR_WSCALEFACTOR_XY: |
| 99 | // LOG_WARNING(ShaderDecompiler, "SR_WSCALEFACTOR_XY (Stubbed)"); | ||
| 99 | return ir.Imm32(Common::BitCast<u32>(1.0f)); | 100 | return ir.Imm32(Common::BitCast<u32>(1.0f)); |
| 100 | case SpecialRegister::SR_WSCALEFACTOR_Z: | 101 | case SpecialRegister::SR_WSCALEFACTOR_Z: |
| 102 | // LOG_WARNING(ShaderDecompiler, "SR_WSCALEFACTOR_Z (Stubbed)"); | ||
| 101 | return ir.Imm32(Common::BitCast<u32>(1.0f)); | 103 | return ir.Imm32(Common::BitCast<u32>(1.0f)); |
| 102 | case SpecialRegister::SR_LANEID: | 104 | case SpecialRegister::SR_LANEID: |
| 103 | return ir.LaneId(); | 105 | return ir.LaneId(); |
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp index 2acabb662..d508e1e23 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp | |||
| @@ -50,10 +50,7 @@ void TranslatorVisitor::VOTE(u64 insn) { | |||
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | void TranslatorVisitor::VOTE_vtg(u64) { | 52 | void TranslatorVisitor::VOTE_vtg(u64) { |
| 53 | // LOG_WARNING("VOTE.VTG: Stubbed!"); | 53 | // LOG_WARNING(ShaderDecompiler, "VOTE.VTG: Stubbed!"); |
| 54 | auto imm = ir.Imm1(false); | ||
| 55 | ir.SetFCSMFlag(imm); | ||
| 56 | ir.SetTRFlag(imm); | ||
| 57 | } | 54 | } |
| 58 | 55 | ||
| 59 | } // namespace Shader::Maxwell | 56 | } // namespace Shader::Maxwell |