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authorGravatar ameerj2021-02-28 23:33:53 -0500
committerGravatar ameerj2021-07-22 21:51:22 -0400
commit20390c0548d6eef2af67a363ee120a630267b741 (patch)
tree0df880552f80d79c769403f04df5c364397396d1 /src/shader_recompiler/frontend
parentshader: Implement BFI (diff)
downloadyuzu-20390c0548d6eef2af67a363ee120a630267b741.tar.gz
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shader: Implement IMNMX
Diffstat (limited to 'src/shader_recompiler/frontend')
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp16
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.h5
-rw-r--r--src/shader_recompiler/frontend/ir/opcodes.inc4
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/integer_minimum_maximum.cpp59
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp12
5 files changed, 84 insertions, 12 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 54fdf9559..04edcdfd8 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -816,6 +816,22 @@ U32 IREmitter::BitwiseNot(const U32& a) {
816 return Inst<U32>(Opcode::BitwiseNot32, a); 816 return Inst<U32>(Opcode::BitwiseNot32, a);
817} 817}
818 818
819U32 IREmitter::SMin(const U32& a, const U32& b) {
820 return Inst<U32>(Opcode::SMin32, a, b);
821}
822
823U32 IREmitter::UMin(const U32& a, const U32& b) {
824 return Inst<U32>(Opcode::UMin32, a, b);
825}
826
827U32 IREmitter::SMax(const U32& a, const U32& b) {
828 return Inst<U32>(Opcode::SMax32, a, b);
829}
830
831U32 IREmitter::UMax(const U32& a, const U32& b) {
832 return Inst<U32>(Opcode::UMax32, a, b);
833}
834
819U1 IREmitter::ILessThan(const U32& lhs, const U32& rhs, bool is_signed) { 835U1 IREmitter::ILessThan(const U32& lhs, const U32& rhs, bool is_signed) {
820 return Inst<U1>(is_signed ? Opcode::SLessThan : Opcode::ULessThan, lhs, rhs); 836 return Inst<U1>(is_signed ? Opcode::SLessThan : Opcode::ULessThan, lhs, rhs);
821} 837}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index 9dec22145..00ba2e4cd 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -163,6 +163,11 @@ public:
163 [[nodiscard]] U32 BitCount(const U32& value); 163 [[nodiscard]] U32 BitCount(const U32& value);
164 [[nodiscard]] U32 BitwiseNot(const U32& a); 164 [[nodiscard]] U32 BitwiseNot(const U32& a);
165 165
166 [[nodiscard]] U32 SMin(const U32& a, const U32& b);
167 [[nodiscard]] U32 UMin(const U32& a, const U32& b);
168 [[nodiscard]] U32 SMax(const U32& a, const U32& b);
169 [[nodiscard]] U32 UMax(const U32& a, const U32& b);
170
166 [[nodiscard]] U1 ILessThan(const U32& lhs, const U32& rhs, bool is_signed); 171 [[nodiscard]] U1 ILessThan(const U32& lhs, const U32& rhs, bool is_signed);
167 [[nodiscard]] U1 IEqual(const U32& lhs, const U32& rhs); 172 [[nodiscard]] U1 IEqual(const U32& lhs, const U32& rhs);
168 [[nodiscard]] U1 ILessThanEqual(const U32& lhs, const U32& rhs, bool is_signed); 173 [[nodiscard]] U1 ILessThanEqual(const U32& lhs, const U32& rhs, bool is_signed);
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index 59a13e911..2c4a997dc 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -235,6 +235,10 @@ OPCODE(BitReverse32, U32, U32,
235OPCODE(BitCount32, U32, U32, ) 235OPCODE(BitCount32, U32, U32, )
236OPCODE(BitwiseNot32, U32, U32, ) 236OPCODE(BitwiseNot32, U32, U32, )
237 237
238OPCODE(SMin32, U32, U32, U32, )
239OPCODE(UMin32, U32, U32, U32, )
240OPCODE(SMax32, U32, U32, U32, )
241OPCODE(UMax32, U32, U32, U32, )
238OPCODE(SLessThan, U1, U32, U32, ) 242OPCODE(SLessThan, U1, U32, U32, )
239OPCODE(ULessThan, U1, U32, U32, ) 243OPCODE(ULessThan, U1, U32, U32, )
240OPCODE(IEqual, U1, U32, U32, ) 244OPCODE(IEqual, U1, U32, U32, )
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_minimum_maximum.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_minimum_maximum.cpp
new file mode 100644
index 000000000..12c6aae3d
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_minimum_maximum.cpp
@@ -0,0 +1,59 @@
1// Copyright 2021 yuzu Emulator Project
2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included.
4
5#include "common/bit_field.h"
6#include "common/common_types.h"
7#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
8
9namespace Shader::Maxwell {
10namespace {
11void IMNMX(TranslatorVisitor& v, u64 insn, const IR::U32& op_b) {
12 union {
13 u64 insn;
14 BitField<0, 8, IR::Reg> dest_reg;
15 BitField<8, 8, IR::Reg> src_reg;
16 BitField<39, 3, IR::Pred> pred;
17 BitField<42, 1, u64> neg_pred;
18 BitField<43, 2, u64> mode;
19 BitField<48, 1, u64> is_signed;
20 } const imnmx{insn};
21
22 if (imnmx.mode != 0) {
23 throw NotImplementedException("IMNMX.MODE");
24 }
25
26 IR::U1 pred = v.ir.GetPred(imnmx.pred);
27 const IR::U32 op_a{v.X(imnmx.src_reg)};
28 IR::U32 min;
29 IR::U32 max;
30
31 if (imnmx.is_signed != 0) {
32 min = IR::U32{v.ir.SMin(op_a, op_b)};
33 max = IR::U32{v.ir.SMax(op_a, op_b)};
34 } else {
35 min = IR::U32{v.ir.UMin(op_a, op_b)};
36 max = IR::U32{v.ir.UMax(op_a, op_b)};
37 }
38 if (imnmx.neg_pred != 0) {
39 std::swap(min, max);
40 }
41
42 const IR::U32 result{v.ir.Select(pred, min, max)};
43 v.X(imnmx.dest_reg, result);
44}
45} // Anonymous namespace
46
47void TranslatorVisitor::IMNMX_reg(u64 insn) {
48 IMNMX(*this, insn, GetReg20(insn));
49}
50
51void TranslatorVisitor::IMNMX_cbuf(u64 insn) {
52 IMNMX(*this, insn, GetCbuf(insn));
53}
54
55void TranslatorVisitor::IMNMX_imm(u64 insn) {
56 IMNMX(*this, insn, GetImm20(insn));
57}
58
59} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
index ed2cfac60..615e3c3b5 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
@@ -453,18 +453,6 @@ void TranslatorVisitor::IMADSP_imm(u64) {
453 ThrowNotImplemented(Opcode::IMADSP_imm); 453 ThrowNotImplemented(Opcode::IMADSP_imm);
454} 454}
455 455
456void TranslatorVisitor::IMNMX_reg(u64) {
457 ThrowNotImplemented(Opcode::IMNMX_reg);
458}
459
460void TranslatorVisitor::IMNMX_cbuf(u64) {
461 ThrowNotImplemented(Opcode::IMNMX_cbuf);
462}
463
464void TranslatorVisitor::IMNMX_imm(u64) {
465 ThrowNotImplemented(Opcode::IMNMX_imm);
466}
467
468void TranslatorVisitor::IMUL_reg(u64) { 456void TranslatorVisitor::IMUL_reg(u64) {
469 ThrowNotImplemented(Opcode::IMUL_reg); 457 ThrowNotImplemented(Opcode::IMUL_reg);
470} 458}