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| author | 2023-09-02 14:42:42 -0400 | |
|---|---|---|
| committer | 2023-09-02 14:42:42 -0400 | |
| commit | 76bddd3673fd960bfb7fd108b0120ae707dde306 (patch) | |
| tree | dd38a2ab05cce71665e15ee7c063b69c90e59650 /src/shader_recompiler/frontend | |
| parent | Merge pull request #11384 from liamwhite/am-shutdown (diff) | |
| parent | VideoCore: Implement DispatchIndirect (diff) | |
| download | yuzu-76bddd3673fd960bfb7fd108b0120ae707dde306.tar.gz yuzu-76bddd3673fd960bfb7fd108b0120ae707dde306.tar.xz yuzu-76bddd3673fd960bfb7fd108b0120ae707dde306.zip | |
Merge pull request #11383 from FernandoS27/are-you-a-wabbit
Fix regressions that damaged compute indirect & use reinterpret for copies with different byteblocksizes
Diffstat (limited to '')
| -rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp index 753c62098..e593132e6 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp | |||
| @@ -161,7 +161,8 @@ enum class SpecialRegister : u64 { | |||
| 161 | LOG_WARNING(Shader, "(STUBBED) SR_AFFINITY"); | 161 | LOG_WARNING(Shader, "(STUBBED) SR_AFFINITY"); |
| 162 | return ir.Imm32(0); // This is the default value hardware returns. | 162 | return ir.Imm32(0); // This is the default value hardware returns. |
| 163 | default: | 163 | default: |
| 164 | throw NotImplementedException("S2R special register {}", special_register); | 164 | LOG_CRITICAL(Shader, "(STUBBED) Special register {}", special_register); |
| 165 | return ir.Imm32(0); // This is the default value hardware returns. | ||
| 165 | } | 166 | } |
| 166 | } | 167 | } |
| 167 | } // Anonymous namespace | 168 | } // Anonymous namespace |