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authorGravatar Feng Chen2022-11-04 14:39:42 +0800
committerGravatar GitHub2022-11-04 02:39:42 -0400
commit75596c07e0fc1462c2a19484e168f4944c33d3d3 (patch)
tree1aa919ea76f467c51b3fc591a72c57f5ade92560 /src/shader_recompiler/frontend
parentUI: Add options to hide extra columns (#9093) (diff)
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video_core: Fix SNORM texture buffer emulating error (#9001)
Diffstat (limited to '')
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp5
-rw-r--r--src/shader_recompiler/frontend/ir/opcodes.h1
-rw-r--r--src/shader_recompiler/frontend/ir/opcodes.inc1
-rw-r--r--src/shader_recompiler/frontend/ir/type.h31
-rw-r--r--src/shader_recompiler/frontend/ir/value.cpp3
-rw-r--r--src/shader_recompiler/frontend/ir/value.h12
6 files changed, 38 insertions, 15 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index de1ce90a3..d4425f06d 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -692,6 +692,11 @@ IR::U32 IREmitter::BitCast<IR::U32, IR::F32>(const IR::F32& value) {
692} 692}
693 693
694template <> 694template <>
695IR::S32 IREmitter::BitCast<IR::S32, IR::F32>(const IR::F32& value) {
696 return Inst<IR::S32>(Opcode::BitCastS32F32, value);
697}
698
699template <>
695IR::F32 IREmitter::BitCast<IR::F32, IR::U32>(const IR::U32& value) { 700IR::F32 IREmitter::BitCast<IR::F32, IR::U32>(const IR::U32& value) {
696 return Inst<IR::F32>(Opcode::BitCastF32U32, value); 701 return Inst<IR::F32>(Opcode::BitCastF32U32, value);
697} 702}
diff --git a/src/shader_recompiler/frontend/ir/opcodes.h b/src/shader_recompiler/frontend/ir/opcodes.h
index 752879a18..e70d7745c 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.h
+++ b/src/shader_recompiler/frontend/ir/opcodes.h
@@ -37,6 +37,7 @@ constexpr Type U8{Type::U8};
37constexpr Type U16{Type::U16}; 37constexpr Type U16{Type::U16};
38constexpr Type U32{Type::U32}; 38constexpr Type U32{Type::U32};
39constexpr Type U64{Type::U64}; 39constexpr Type U64{Type::U64};
40constexpr Type S32{Type::S32};
40constexpr Type F16{Type::F16}; 41constexpr Type F16{Type::F16};
41constexpr Type F32{Type::F32}; 42constexpr Type F32{Type::F32};
42constexpr Type F64{Type::F64}; 43constexpr Type F64{Type::F64};
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index f3038f298..88aa077ee 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -174,6 +174,7 @@ OPCODE(SelectF64, F64, U1,
174OPCODE(BitCastU16F16, U16, F16, ) 174OPCODE(BitCastU16F16, U16, F16, )
175OPCODE(BitCastU32F32, U32, F32, ) 175OPCODE(BitCastU32F32, U32, F32, )
176OPCODE(BitCastU64F64, U64, F64, ) 176OPCODE(BitCastU64F64, U64, F64, )
177OPCODE(BitCastS32F32, S32, F32, )
177OPCODE(BitCastF16U16, F16, U16, ) 178OPCODE(BitCastF16U16, F16, U16, )
178OPCODE(BitCastF32U32, F32, U32, ) 179OPCODE(BitCastF32U32, F32, U32, )
179OPCODE(BitCastF64U64, F64, U64, ) 180OPCODE(BitCastF64U64, F64, U64, )
diff --git a/src/shader_recompiler/frontend/ir/type.h b/src/shader_recompiler/frontend/ir/type.h
index 04c8c4ddb..5a7c706ad 100644
--- a/src/shader_recompiler/frontend/ir/type.h
+++ b/src/shader_recompiler/frontend/ir/type.h
@@ -24,21 +24,22 @@ enum class Type {
24 U16 = 1 << 7, 24 U16 = 1 << 7,
25 U32 = 1 << 8, 25 U32 = 1 << 8,
26 U64 = 1 << 9, 26 U64 = 1 << 9,
27 F16 = 1 << 10, 27 S32 = 1 << 10,
28 F32 = 1 << 11, 28 F16 = 1 << 11,
29 F64 = 1 << 12, 29 F32 = 1 << 12,
30 U32x2 = 1 << 13, 30 F64 = 1 << 13,
31 U32x3 = 1 << 14, 31 U32x2 = 1 << 14,
32 U32x4 = 1 << 15, 32 U32x3 = 1 << 15,
33 F16x2 = 1 << 16, 33 U32x4 = 1 << 16,
34 F16x3 = 1 << 17, 34 F16x2 = 1 << 17,
35 F16x4 = 1 << 18, 35 F16x3 = 1 << 18,
36 F32x2 = 1 << 19, 36 F16x4 = 1 << 19,
37 F32x3 = 1 << 20, 37 F32x2 = 1 << 20,
38 F32x4 = 1 << 21, 38 F32x3 = 1 << 21,
39 F64x2 = 1 << 22, 39 F32x4 = 1 << 22,
40 F64x3 = 1 << 23, 40 F64x2 = 1 << 23,
41 F64x4 = 1 << 24, 41 F64x3 = 1 << 24,
42 F64x4 = 1 << 25,
42}; 43};
43DECLARE_ENUM_FLAG_OPERATORS(Type) 44DECLARE_ENUM_FLAG_OPERATORS(Type)
44 45
diff --git a/src/shader_recompiler/frontend/ir/value.cpp b/src/shader_recompiler/frontend/ir/value.cpp
index 346169328..30ba12316 100644
--- a/src/shader_recompiler/frontend/ir/value.cpp
+++ b/src/shader_recompiler/frontend/ir/value.cpp
@@ -23,6 +23,8 @@ Value::Value(u16 value) noexcept : type{Type::U16}, imm_u16{value} {}
23 23
24Value::Value(u32 value) noexcept : type{Type::U32}, imm_u32{value} {} 24Value::Value(u32 value) noexcept : type{Type::U32}, imm_u32{value} {}
25 25
26Value::Value(s32 value) noexcept : type{Type::S32}, imm_s32{value} {}
27
26Value::Value(f32 value) noexcept : type{Type::F32}, imm_f32{value} {} 28Value::Value(f32 value) noexcept : type{Type::F32}, imm_f32{value} {}
27 29
28Value::Value(u64 value) noexcept : type{Type::U64}, imm_u64{value} {} 30Value::Value(u64 value) noexcept : type{Type::U64}, imm_u64{value} {}
@@ -69,6 +71,7 @@ bool Value::operator==(const Value& other) const {
69 return imm_u16 == other.imm_u16; 71 return imm_u16 == other.imm_u16;
70 case Type::U32: 72 case Type::U32:
71 case Type::F32: 73 case Type::F32:
74 case Type::S32:
72 return imm_u32 == other.imm_u32; 75 return imm_u32 == other.imm_u32;
73 case Type::U64: 76 case Type::U64:
74 case Type::F64: 77 case Type::F64:
diff --git a/src/shader_recompiler/frontend/ir/value.h b/src/shader_recompiler/frontend/ir/value.h
index 6a673ca05..e8bbb93a5 100644
--- a/src/shader_recompiler/frontend/ir/value.h
+++ b/src/shader_recompiler/frontend/ir/value.h
@@ -44,6 +44,7 @@ public:
44 explicit Value(u8 value) noexcept; 44 explicit Value(u8 value) noexcept;
45 explicit Value(u16 value) noexcept; 45 explicit Value(u16 value) noexcept;
46 explicit Value(u32 value) noexcept; 46 explicit Value(u32 value) noexcept;
47 explicit Value(s32 value) noexcept;
47 explicit Value(f32 value) noexcept; 48 explicit Value(f32 value) noexcept;
48 explicit Value(u64 value) noexcept; 49 explicit Value(u64 value) noexcept;
49 explicit Value(f64 value) noexcept; 50 explicit Value(f64 value) noexcept;
@@ -66,6 +67,7 @@ public:
66 [[nodiscard]] u8 U8() const; 67 [[nodiscard]] u8 U8() const;
67 [[nodiscard]] u16 U16() const; 68 [[nodiscard]] u16 U16() const;
68 [[nodiscard]] u32 U32() const; 69 [[nodiscard]] u32 U32() const;
70 [[nodiscard]] s32 S32() const;
69 [[nodiscard]] f32 F32() const; 71 [[nodiscard]] f32 F32() const;
70 [[nodiscard]] u64 U64() const; 72 [[nodiscard]] u64 U64() const;
71 [[nodiscard]] f64 F64() const; 73 [[nodiscard]] f64 F64() const;
@@ -85,6 +87,7 @@ private:
85 u8 imm_u8; 87 u8 imm_u8;
86 u16 imm_u16; 88 u16 imm_u16;
87 u32 imm_u32; 89 u32 imm_u32;
90 s32 imm_s32;
88 f32 imm_f32; 91 f32 imm_f32;
89 u64 imm_u64; 92 u64 imm_u64;
90 f64 imm_f64; 93 f64 imm_f64;
@@ -266,6 +269,7 @@ using U8 = TypedValue<Type::U8>;
266using U16 = TypedValue<Type::U16>; 269using U16 = TypedValue<Type::U16>;
267using U32 = TypedValue<Type::U32>; 270using U32 = TypedValue<Type::U32>;
268using U64 = TypedValue<Type::U64>; 271using U64 = TypedValue<Type::U64>;
272using S32 = TypedValue<Type::S32>;
269using F16 = TypedValue<Type::F16>; 273using F16 = TypedValue<Type::F16>;
270using F32 = TypedValue<Type::F32>; 274using F32 = TypedValue<Type::F32>;
271using F64 = TypedValue<Type::F64>; 275using F64 = TypedValue<Type::F64>;
@@ -377,6 +381,14 @@ inline u32 Value::U32() const {
377 return imm_u32; 381 return imm_u32;
378} 382}
379 383
384inline s32 Value::S32() const {
385 if (IsIdentity()) {
386 return inst->Arg(0).S32();
387 }
388 DEBUG_ASSERT(type == Type::S32);
389 return imm_s32;
390}
391
380inline f32 Value::F32() const { 392inline f32 Value::F32() const {
381 if (IsIdentity()) { 393 if (IsIdentity()) {
382 return inst->Arg(0).F32(); 394 return inst->Arg(0).F32();