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| author | 2021-02-21 23:42:38 -0300 | |
|---|---|---|
| committer | 2021-07-22 21:51:22 -0400 | |
| commit | 274897dfd59b4d08029ab7e93be4f84654abcdc8 (patch) | |
| tree | 083336a4d665476a87b888368878a311a7edab2a /src/shader_recompiler/frontend | |
| parent | shader: Rename, implement FADD.SAT and P2R (imm) (diff) | |
| download | yuzu-274897dfd59b4d08029ab7e93be4f84654abcdc8.tar.gz yuzu-274897dfd59b4d08029ab7e93be4f84654abcdc8.tar.xz yuzu-274897dfd59b4d08029ab7e93be4f84654abcdc8.zip | |
spirv: Fixes and Intel specific workarounds
Diffstat (limited to '')
3 files changed, 9 insertions, 12 deletions
diff --git a/src/shader_recompiler/frontend/ir/structured_control_flow.cpp b/src/shader_recompiler/frontend/ir/structured_control_flow.cpp index d145095d1..032ac8fda 100644 --- a/src/shader_recompiler/frontend/ir/structured_control_flow.cpp +++ b/src/shader_recompiler/frontend/ir/structured_control_flow.cpp | |||
| @@ -272,11 +272,9 @@ public: | |||
| 272 | explicit GotoPass(std::span<Block* const> blocks, ObjectPool<Statement>& stmt_pool) | 272 | explicit GotoPass(std::span<Block* const> blocks, ObjectPool<Statement>& stmt_pool) |
| 273 | : pool{stmt_pool} { | 273 | : pool{stmt_pool} { |
| 274 | std::vector gotos{BuildUnorderedTreeGetGotos(blocks)}; | 274 | std::vector gotos{BuildUnorderedTreeGetGotos(blocks)}; |
| 275 | fmt::print(stdout, "BEFORE\n{}\n", DumpTree(root_stmt.children)); | ||
| 276 | for (const Node& goto_stmt : gotos | std::views::reverse) { | 275 | for (const Node& goto_stmt : gotos | std::views::reverse) { |
| 277 | RemoveGoto(goto_stmt); | 276 | RemoveGoto(goto_stmt); |
| 278 | } | 277 | } |
| 279 | fmt::print(stdout, "AFTER\n{}\n", DumpTree(root_stmt.children)); | ||
| 280 | } | 278 | } |
| 281 | 279 | ||
| 282 | Statement& RootStatement() noexcept { | 280 | Statement& RootStatement() noexcept { |
| @@ -548,7 +546,6 @@ private: | |||
| 548 | size_t Offset(ConstNode stmt) const { | 546 | size_t Offset(ConstNode stmt) const { |
| 549 | size_t offset{0}; | 547 | size_t offset{0}; |
| 550 | if (!SearchNode(root_stmt.children, stmt, offset)) { | 548 | if (!SearchNode(root_stmt.children, stmt, offset)) { |
| 551 | fmt::print(stdout, "{}\n", DumpTree(root_stmt.children)); | ||
| 552 | throw LogicError("Node not found in tree"); | 549 | throw LogicError("Node not found in tree"); |
| 553 | } | 550 | } |
| 554 | return offset; | 551 | return offset; |
diff --git a/src/shader_recompiler/frontend/maxwell/program.cpp b/src/shader_recompiler/frontend/maxwell/program.cpp index ed5dbf41f..dbfc04f75 100644 --- a/src/shader_recompiler/frontend/maxwell/program.cpp +++ b/src/shader_recompiler/frontend/maxwell/program.cpp | |||
| @@ -56,7 +56,6 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo | |||
| 56 | .post_order_blocks{}, | 56 | .post_order_blocks{}, |
| 57 | }); | 57 | }); |
| 58 | } | 58 | } |
| 59 | fmt::print(stdout, "{}\n", IR::DumpProgram(program)); | ||
| 60 | Optimization::LowerFp16ToFp32(program); | 59 | Optimization::LowerFp16ToFp32(program); |
| 61 | for (IR::Function& function : functions) { | 60 | for (IR::Function& function : functions) { |
| 62 | function.post_order_blocks = PostOrder(function.blocks); | 61 | function.post_order_blocks = PostOrder(function.blocks); |
| @@ -70,8 +69,6 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo | |||
| 70 | Optimization::VerificationPass(function); | 69 | Optimization::VerificationPass(function); |
| 71 | } | 70 | } |
| 72 | Optimization::CollectShaderInfoPass(program); | 71 | Optimization::CollectShaderInfoPass(program); |
| 73 | |||
| 74 | fmt::print(stdout, "{}\n", IR::DumpProgram(program)); | ||
| 75 | return program; | 72 | return program; |
| 76 | } | 73 | } |
| 77 | 74 | ||
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp index be17bb0d9..165d475b9 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp | |||
| @@ -83,9 +83,12 @@ IR::U32 TranslatorVisitor::GetImm20(u64 insn) { | |||
| 83 | BitField<20, 19, u64> value; | 83 | BitField<20, 19, u64> value; |
| 84 | BitField<56, 1, u64> is_negative; | 84 | BitField<56, 1, u64> is_negative; |
| 85 | } const imm{insn}; | 85 | } const imm{insn}; |
| 86 | const s32 positive_value{static_cast<s32>(imm.value)}; | 86 | if (imm.is_negative != 0) { |
| 87 | const s32 value{imm.is_negative != 0 ? -positive_value : positive_value}; | 87 | const s64 raw{static_cast<s64>(imm.value)}; |
| 88 | return ir.Imm32(value); | 88 | return ir.Imm32(static_cast<s32>(-(1LL << 19) + raw)); |
| 89 | } else { | ||
| 90 | return ir.Imm32(static_cast<u32>(imm.value)); | ||
| 91 | } | ||
| 89 | } | 92 | } |
| 90 | 93 | ||
| 91 | IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) { | 94 | IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) { |
| @@ -94,9 +97,9 @@ IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) { | |||
| 94 | BitField<20, 19, u64> value; | 97 | BitField<20, 19, u64> value; |
| 95 | BitField<56, 1, u64> is_negative; | 98 | BitField<56, 1, u64> is_negative; |
| 96 | } const imm{insn}; | 99 | } const imm{insn}; |
| 97 | const f32 positive_value{Common::BitCast<f32>(static_cast<u32>(imm.value) << 12)}; | 100 | const u32 sign_bit{imm.is_negative != 0 ? (1ULL << 31) : 0}; |
| 98 | const f32 value{imm.is_negative != 0 ? -positive_value : positive_value}; | 101 | const u32 value{static_cast<u32>(imm.value) << 12}; |
| 99 | return ir.Imm32(value); | 102 | return ir.Imm32(Common::BitCast<f32>(value | sign_bit)); |
| 100 | } | 103 | } |
| 101 | 104 | ||
| 102 | IR::U32 TranslatorVisitor::GetImm32(u64 insn) { | 105 | IR::U32 TranslatorVisitor::GetImm32(u64 insn) { |