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authorGravatar lat9nq2021-04-05 22:25:22 -0400
committerGravatar ameerj2021-07-22 21:51:26 -0400
commit0bb85f6a753c769266c95c4ba146b25b9eaaaffd (patch)
treee5d818ae7dc1d0025bb115c7a63235d866e53286 /src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
parentshader: Fix FCMP immediate variant (diff)
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shader_recompiler,video_core: Cleanup some GCC and Clang errors
Mostly fixing unused *, implicit conversion, braced scalar init, fpermissive, and some others. Some Clang errors likely remain in video_core, and std::ranges is still a pertinent issue in shader_recompiler shader_recompiler: cmake: Force bracket depth to 1024 on Clang Increases the maximum fold expression depth thread_worker: Include condition_variable Don't use list initializers in control flow Co-authored-by: ReinUsesLisp <reinuseslisp@airmail.cc>
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp')
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
index 30b570ce4..88bbac0a5 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
@@ -49,7 +49,7 @@ void TranslatorVisitor::L(IR::Reg dest_reg, const IR::U64& value) {
49 } 49 }
50 const IR::Value result{ir.UnpackUint2x32(value)}; 50 const IR::Value result{ir.UnpackUint2x32(value)};
51 for (int i = 0; i < 2; i++) { 51 for (int i = 0; i < 2; i++) {
52 X(dest_reg + i, IR::U32{ir.CompositeExtract(result, i)}); 52 X(dest_reg + i, IR::U32{ir.CompositeExtract(result, static_cast<size_t>(i))});
53 } 53 }
54} 54}
55 55
@@ -63,7 +63,7 @@ void TranslatorVisitor::D(IR::Reg dest_reg, const IR::F64& value) {
63 } 63 }
64 const IR::Value result{ir.UnpackDouble2x32(value)}; 64 const IR::Value result{ir.UnpackDouble2x32(value)};
65 for (int i = 0; i < 2; i++) { 65 for (int i = 0; i < 2; i++) {
66 X(dest_reg + i, IR::U32{ir.CompositeExtract(result, i)}); 66 X(dest_reg + i, IR::U32{ir.CompositeExtract(result, static_cast<size_t>(i))});
67 } 67 }
68} 68}
69 69
@@ -156,7 +156,7 @@ IR::F64 TranslatorVisitor::GetDoubleCbuf(u64 insn) {
156 const auto [binding, offset_value]{CbufAddr(insn)}; 156 const auto [binding, offset_value]{CbufAddr(insn)};
157 const bool unaligned{cbuf.unaligned != 0}; 157 const bool unaligned{cbuf.unaligned != 0};
158 const u32 offset{offset_value.U32()}; 158 const u32 offset{offset_value.U32()};
159 const IR::Value addr{unaligned ? offset | 4 : (offset & ~7) | 4}; 159 const IR::Value addr{unaligned ? offset | 4u : (offset & ~7u) | 4u};
160 160
161 const IR::U32 value{ir.GetCbuf(binding, IR::U32{addr})}; 161 const IR::U32 value{ir.GetCbuf(binding, IR::U32{addr})};
162 const IR::U32 lower_bits{CbufLowerBits(ir, unaligned, binding, offset)}; 162 const IR::U32 lower_bits{CbufLowerBits(ir, unaligned, binding, offset)};
@@ -200,7 +200,7 @@ IR::F32 TranslatorVisitor::GetFloatImm20(u64 insn) {
200 BitField<20, 19, u64> value; 200 BitField<20, 19, u64> value;
201 BitField<56, 1, u64> is_negative; 201 BitField<56, 1, u64> is_negative;
202 } const imm{insn}; 202 } const imm{insn};
203 const u32 sign_bit{imm.is_negative != 0 ? (1ULL << 31) : 0}; 203 const u32 sign_bit{static_cast<u32>(imm.is_negative != 0 ? (1ULL << 31) : 0)};
204 const u32 value{static_cast<u32>(imm.value) << 12}; 204 const u32 value{static_cast<u32>(imm.value) << 12};
205 return ir.Imm32(Common::BitCast<f32>(value | sign_bit)); 205 return ir.Imm32(Common::BitCast<f32>(value | sign_bit));
206} 206}