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authorGravatar ReinUsesLisp2021-05-18 02:04:22 -0300
committerGravatar ameerj2021-07-22 21:51:32 -0400
commit9bb3e008c9f4bbdd35c095b506c3a3312d17e383 (patch)
tree320cc594970b6ef658d8bed88ceabded0f84caea /src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
parentglasm: Implement InstanceId and VertexId (diff)
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shader: Read branch conditions from an instruction
Fixes the identity removal pass.
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp')
-rw-r--r--src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp9
1 files changed, 3 insertions, 6 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp b/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
index 83554a953..ebe5c2654 100644
--- a/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
+++ b/src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
@@ -703,8 +703,7 @@ private:
703 703
704 // Implement if header block 704 // Implement if header block
705 IR::IREmitter ir{*current_block}; 705 IR::IREmitter ir{*current_block};
706 const IR::U1 cond{VisitExpr(ir, *stmt.cond)}; 706 const IR::U1 cond{ir.ConditionRef(VisitExpr(ir, *stmt.cond))};
707 ir.DummyReference(cond);
708 707
709 const size_t if_node_index{syntax_list.size()}; 708 const size_t if_node_index{syntax_list.size()};
710 syntax_list.emplace_back(); 709 syntax_list.emplace_back();
@@ -754,8 +753,7 @@ private:
754 753
755 // The continue block is located at the end of the loop 754 // The continue block is located at the end of the loop
756 IR::IREmitter ir{*continue_block}; 755 IR::IREmitter ir{*continue_block};
757 const IR::U1 cond{VisitExpr(ir, *stmt.cond)}; 756 const IR::U1 cond{ir.ConditionRef(VisitExpr(ir, *stmt.cond))};
758 ir.DummyReference(cond);
759 757
760 IR::Block* const body_block{syntax_list.at(body_block_index).data.block}; 758 IR::Block* const body_block{syntax_list.at(body_block_index).data.block};
761 loop_header_block->AddBranch(body_block); 759 loop_header_block->AddBranch(body_block);
@@ -791,8 +789,7 @@ private:
791 IR::Block* const skip_block{MergeBlock(parent, stmt)}; 789 IR::Block* const skip_block{MergeBlock(parent, stmt)};
792 790
793 IR::IREmitter ir{*current_block}; 791 IR::IREmitter ir{*current_block};
794 const IR::U1 cond{VisitExpr(ir, *stmt.cond)}; 792 const IR::U1 cond{ir.ConditionRef(VisitExpr(ir, *stmt.cond))};
795 ir.DummyReference(cond);
796 current_block->AddBranch(break_block); 793 current_block->AddBranch(break_block);
797 current_block->AddBranch(skip_block); 794 current_block->AddBranch(skip_block);
798 current_block = skip_block; 795 current_block = skip_block;