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authorGravatar ReinUsesLisp2021-04-10 16:46:26 -0300
committerGravatar ameerj2021-07-22 21:51:27 -0400
commitd404b871d595794184b8d80fc05682eb6e2792fe (patch)
tree83c67b11fa65271ae7ada57b403a6b9c55cf4b5e /src/shader_recompiler/frontend/ir/microinstruction.cpp
parentshader: Implement CC for ISET, FSET, PSET, CSET, and DSET (diff)
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shader: Mark ImageWrite with side effects
Diffstat (limited to 'src/shader_recompiler/frontend/ir/microinstruction.cpp')
-rw-r--r--src/shader_recompiler/frontend/ir/microinstruction.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp
index ceb44e604..2df631791 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.cpp
+++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp
@@ -93,6 +93,9 @@ bool Inst::MayHaveSideEffects() const noexcept {
93 case Opcode::WriteSharedU32: 93 case Opcode::WriteSharedU32:
94 case Opcode::WriteSharedU64: 94 case Opcode::WriteSharedU64:
95 case Opcode::WriteSharedU128: 95 case Opcode::WriteSharedU128:
96 case Opcode::BindlessImageWrite:
97 case Opcode::BoundImageWrite:
98 case Opcode::ImageWrite:
96 return true; 99 return true;
97 default: 100 default:
98 return false; 101 return false;