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authorGravatar ReinUsesLisp2021-04-15 22:46:11 -0300
committerGravatar ameerj2021-07-22 21:51:27 -0400
commit183855e396cc6918d36fbf3e38ea426e934b4e3e (patch)
treea665794753520c09a1d34d8a086352894ec1cb72 /src/shader_recompiler/frontend/ir/microinstruction.cpp
parentshader: Mark atomic instructions as writes (diff)
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shader: Implement tessellation shaders, polygon mode and invocation id
Diffstat (limited to 'src/shader_recompiler/frontend/ir/microinstruction.cpp')
-rw-r--r--src/shader_recompiler/frontend/ir/microinstruction.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp
index 204c55fa8..b2d7573d9 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.cpp
+++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp
@@ -73,6 +73,7 @@ bool Inst::MayHaveSideEffects() const noexcept {
73 case Opcode::EndPrimitive: 73 case Opcode::EndPrimitive:
74 case Opcode::SetAttribute: 74 case Opcode::SetAttribute:
75 case Opcode::SetAttributeIndexed: 75 case Opcode::SetAttributeIndexed:
76 case Opcode::SetPatch:
76 case Opcode::SetFragColor: 77 case Opcode::SetFragColor:
77 case Opcode::SetFragDepth: 78 case Opcode::SetFragDepth:
78 case Opcode::WriteGlobalU8: 79 case Opcode::WriteGlobalU8: