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authorGravatar ameerj2021-03-25 11:31:37 -0400
committerGravatar ameerj2021-07-22 21:51:24 -0400
commit32c5483beb2f79f5d55eb2906f2bfdfa1698bca3 (patch)
treebca00dad85f6823746aee66f43dc0cbe2f337481 /src/shader_recompiler/frontend/ir/ir_emitter.cpp
parentshader: Track first bindless argument instead of the instruction itself (diff)
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shader: Implement SHFL
Diffstat (limited to 'src/shader_recompiler/frontend/ir/ir_emitter.cpp')
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 6280c08f6..418b7f5ac 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -374,6 +374,10 @@ U1 IREmitter::GetSparseFromOp(const Value& op) {
374 return Inst<U1>(Opcode::GetSparseFromOp, op); 374 return Inst<U1>(Opcode::GetSparseFromOp, op);
375} 375}
376 376
377U1 IREmitter::GetInBoundsFromOp(const Value& op) {
378 return Inst<U1>(Opcode::GetInBoundsFromOp, op);
379}
380
377F16F32F64 IREmitter::FPAdd(const F16F32F64& a, const F16F32F64& b, FpControl control) { 381F16F32F64 IREmitter::FPAdd(const F16F32F64& a, const F16F32F64& b, FpControl control) {
378 if (a.Type() != b.Type()) { 382 if (a.Type() != b.Type()) {
379 throw InvalidArgument("Mismatching types {} and {}", a.Type(), b.Type()); 383 throw InvalidArgument("Mismatching types {} and {}", a.Type(), b.Type());
@@ -1486,4 +1490,23 @@ U32 IREmitter::SubgroupBallot(const U1& value) {
1486 return Inst<U32>(Opcode::SubgroupBallot, value); 1490 return Inst<U32>(Opcode::SubgroupBallot, value);
1487} 1491}
1488 1492
1493U32 IREmitter::ShuffleIndex(const IR::U32& value, const IR::U32& index, const IR::U32& clamp,
1494 const IR::U32& seg_mask) {
1495 return Inst<U32>(Opcode::ShuffleIndex, value, index, clamp, seg_mask);
1496}
1497
1498U32 IREmitter::ShuffleUp(const IR::U32& value, const IR::U32& index, const IR::U32& clamp,
1499 const IR::U32& seg_mask) {
1500 return Inst<U32>(Opcode::ShuffleUp, value, index, clamp, seg_mask);
1501}
1502
1503U32 IREmitter::ShuffleDown(const IR::U32& value, const IR::U32& index, const IR::U32& clamp,
1504 const IR::U32& seg_mask) {
1505 return Inst<U32>(Opcode::ShuffleDown, value, index, clamp, seg_mask);
1506}
1507
1508U32 IREmitter::ShuffleButterfly(const IR::U32& value, const IR::U32& index, const IR::U32& clamp,
1509 const IR::U32& seg_mask) {
1510 return Inst<U32>(Opcode::ShuffleButterfly, value, index, clamp, seg_mask);
1511}
1489} // namespace Shader::IR 1512} // namespace Shader::IR