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authorGravatar ReinUsesLisp2021-02-22 22:59:16 -0300
committerGravatar ameerj2021-07-22 21:51:22 -0400
commite44752ddc8804961eb84f8c225bb36d5b4c77bc1 (patch)
tree84df0e38680470a0ee8c2230625193c4156ddea6 /src/shader_recompiler/backend
parentshader: Fix MOV(reg), add SHL variants and emit neg and abs instructions (diff)
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shader: FMUL, select, RRO, and MUFU fixes
Diffstat (limited to 'src/shader_recompiler/backend')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.h67
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp192
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_select.cpp21
3 files changed, 228 insertions, 52 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index 1b9be445e..130c71996 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -108,10 +108,12 @@ void EmitCompositeConstructF64x4(EmitContext& ctx);
108void EmitCompositeExtractF64x2(EmitContext& ctx); 108void EmitCompositeExtractF64x2(EmitContext& ctx);
109void EmitCompositeExtractF64x3(EmitContext& ctx); 109void EmitCompositeExtractF64x3(EmitContext& ctx);
110void EmitCompositeExtractF64x4(EmitContext& ctx); 110void EmitCompositeExtractF64x4(EmitContext& ctx);
111void EmitSelect8(EmitContext& ctx); 111Id EmitSelectU8(EmitContext& ctx, Id cond, Id true_value, Id false_value);
112void EmitSelect16(EmitContext& ctx); 112Id EmitSelectU16(EmitContext& ctx, Id cond, Id true_value, Id false_value);
113Id EmitSelect32(EmitContext& ctx, Id cond, Id true_value, Id false_value); 113Id EmitSelectU32(EmitContext& ctx, Id cond, Id true_value, Id false_value);
114void EmitSelect64(EmitContext& ctx); 114Id EmitSelectU64(EmitContext& ctx, Id cond, Id true_value, Id false_value);
115Id EmitSelectF16(EmitContext& ctx, Id cond, Id true_value, Id false_value);
116Id EmitSelectF32(EmitContext& ctx, Id cond, Id true_value, Id false_value);
115void EmitBitCastU16F16(EmitContext& ctx); 117void EmitBitCastU16F16(EmitContext& ctx);
116Id EmitBitCastU32F32(EmitContext& ctx, Id value); 118Id EmitBitCastU32F32(EmitContext& ctx, Id value);
117void EmitBitCastU64F64(EmitContext& ctx); 119void EmitBitCastU64F64(EmitContext& ctx);
@@ -149,18 +151,15 @@ Id EmitFPMul64(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
149Id EmitFPNeg16(EmitContext& ctx, Id value); 151Id EmitFPNeg16(EmitContext& ctx, Id value);
150Id EmitFPNeg32(EmitContext& ctx, Id value); 152Id EmitFPNeg32(EmitContext& ctx, Id value);
151Id EmitFPNeg64(EmitContext& ctx, Id value); 153Id EmitFPNeg64(EmitContext& ctx, Id value);
152void EmitFPRecip32(EmitContext& ctx); 154Id EmitFPSin(EmitContext& ctx, Id value);
153void EmitFPRecip64(EmitContext& ctx); 155Id EmitFPCos(EmitContext& ctx, Id value);
154void EmitFPRecipSqrt32(EmitContext& ctx); 156Id EmitFPExp2(EmitContext& ctx, Id value);
155void EmitFPRecipSqrt64(EmitContext& ctx); 157Id EmitFPLog2(EmitContext& ctx, Id value);
156void EmitFPSqrt(EmitContext& ctx); 158Id EmitFPRecip32(EmitContext& ctx, Id value);
157void EmitFPSin(EmitContext& ctx); 159Id EmitFPRecip64(EmitContext& ctx, Id value);
158void EmitFPSinNotReduced(EmitContext& ctx); 160Id EmitFPRecipSqrt32(EmitContext& ctx, Id value);
159void EmitFPExp2(EmitContext& ctx); 161Id EmitFPRecipSqrt64(EmitContext& ctx, Id value);
160void EmitFPExp2NotReduced(EmitContext& ctx); 162Id EmitFPSqrt(EmitContext& ctx, Id value);
161void EmitFPCos(EmitContext& ctx);
162void EmitFPCosNotReduced(EmitContext& ctx);
163void EmitFPLog2(EmitContext& ctx);
164Id EmitFPSaturate16(EmitContext& ctx, Id value); 163Id EmitFPSaturate16(EmitContext& ctx, Id value);
165Id EmitFPSaturate32(EmitContext& ctx, Id value); 164Id EmitFPSaturate32(EmitContext& ctx, Id value);
166Id EmitFPSaturate64(EmitContext& ctx, Id value); 165Id EmitFPSaturate64(EmitContext& ctx, Id value);
@@ -176,6 +175,42 @@ Id EmitFPCeil64(EmitContext& ctx, Id value);
176Id EmitFPTrunc16(EmitContext& ctx, Id value); 175Id EmitFPTrunc16(EmitContext& ctx, Id value);
177Id EmitFPTrunc32(EmitContext& ctx, Id value); 176Id EmitFPTrunc32(EmitContext& ctx, Id value);
178Id EmitFPTrunc64(EmitContext& ctx, Id value); 177Id EmitFPTrunc64(EmitContext& ctx, Id value);
178Id EmitFPOrdEqual16(EmitContext& ctx, Id lhs, Id rhs);
179Id EmitFPOrdEqual32(EmitContext& ctx, Id lhs, Id rhs);
180Id EmitFPOrdEqual64(EmitContext& ctx, Id lhs, Id rhs);
181Id EmitFPUnordEqual16(EmitContext& ctx, Id lhs, Id rhs);
182Id EmitFPUnordEqual32(EmitContext& ctx, Id lhs, Id rhs);
183Id EmitFPUnordEqual64(EmitContext& ctx, Id lhs, Id rhs);
184Id EmitFPOrdNotEqual16(EmitContext& ctx, Id lhs, Id rhs);
185Id EmitFPOrdNotEqual32(EmitContext& ctx, Id lhs, Id rhs);
186Id EmitFPOrdNotEqual64(EmitContext& ctx, Id lhs, Id rhs);
187Id EmitFPUnordNotEqual16(EmitContext& ctx, Id lhs, Id rhs);
188Id EmitFPUnordNotEqual32(EmitContext& ctx, Id lhs, Id rhs);
189Id EmitFPUnordNotEqual64(EmitContext& ctx, Id lhs, Id rhs);
190Id EmitFPOrdLessThan16(EmitContext& ctx, Id lhs, Id rhs);
191Id EmitFPOrdLessThan32(EmitContext& ctx, Id lhs, Id rhs);
192Id EmitFPOrdLessThan64(EmitContext& ctx, Id lhs, Id rhs);
193Id EmitFPUnordLessThan16(EmitContext& ctx, Id lhs, Id rhs);
194Id EmitFPUnordLessThan32(EmitContext& ctx, Id lhs, Id rhs);
195Id EmitFPUnordLessThan64(EmitContext& ctx, Id lhs, Id rhs);
196Id EmitFPOrdGreaterThan16(EmitContext& ctx, Id lhs, Id rhs);
197Id EmitFPOrdGreaterThan32(EmitContext& ctx, Id lhs, Id rhs);
198Id EmitFPOrdGreaterThan64(EmitContext& ctx, Id lhs, Id rhs);
199Id EmitFPUnordGreaterThan16(EmitContext& ctx, Id lhs, Id rhs);
200Id EmitFPUnordGreaterThan32(EmitContext& ctx, Id lhs, Id rhs);
201Id EmitFPUnordGreaterThan64(EmitContext& ctx, Id lhs, Id rhs);
202Id EmitFPOrdLessThanEqual16(EmitContext& ctx, Id lhs, Id rhs);
203Id EmitFPOrdLessThanEqual32(EmitContext& ctx, Id lhs, Id rhs);
204Id EmitFPOrdLessThanEqual64(EmitContext& ctx, Id lhs, Id rhs);
205Id EmitFPUnordLessThanEqual16(EmitContext& ctx, Id lhs, Id rhs);
206Id EmitFPUnordLessThanEqual32(EmitContext& ctx, Id lhs, Id rhs);
207Id EmitFPUnordLessThanEqual64(EmitContext& ctx, Id lhs, Id rhs);
208Id EmitFPOrdGreaterThanEqual16(EmitContext& ctx, Id lhs, Id rhs);
209Id EmitFPOrdGreaterThanEqual32(EmitContext& ctx, Id lhs, Id rhs);
210Id EmitFPOrdGreaterThanEqual64(EmitContext& ctx, Id lhs, Id rhs);
211Id EmitFPUnordGreaterThanEqual16(EmitContext& ctx, Id lhs, Id rhs);
212Id EmitFPUnordGreaterThanEqual32(EmitContext& ctx, Id lhs, Id rhs);
213Id EmitFPUnordGreaterThanEqual64(EmitContext& ctx, Id lhs, Id rhs);
179Id EmitIAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); 214Id EmitIAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
180void EmitIAdd64(EmitContext& ctx); 215void EmitIAdd64(EmitContext& ctx);
181Id EmitISub32(EmitContext& ctx, Id a, Id b); 216Id EmitISub32(EmitContext& ctx, Id a, Id b);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
index 5d0b74f9b..749f11742 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
@@ -100,52 +100,40 @@ Id EmitFPNeg64(EmitContext& ctx, Id value) {
100 return ctx.OpFNegate(ctx.F64[1], value); 100 return ctx.OpFNegate(ctx.F64[1], value);
101} 101}
102 102
103void EmitFPRecip32(EmitContext&) { 103Id EmitFPSin(EmitContext& ctx, Id value) {
104 throw NotImplementedException("SPIR-V Instruction"); 104 return ctx.OpSin(ctx.F32[1], value);
105}
106
107void EmitFPRecip64(EmitContext&) {
108 throw NotImplementedException("SPIR-V Instruction");
109} 105}
110 106
111void EmitFPRecipSqrt32(EmitContext&) { 107Id EmitFPCos(EmitContext& ctx, Id value) {
112 throw NotImplementedException("SPIR-V Instruction"); 108 return ctx.OpCos(ctx.F32[1], value);
113} 109}
114 110
115void EmitFPRecipSqrt64(EmitContext&) { 111Id EmitFPExp2(EmitContext& ctx, Id value) {
116 throw NotImplementedException("SPIR-V Instruction"); 112 return ctx.OpExp2(ctx.F32[1], value);
117} 113}
118 114
119void EmitFPSqrt(EmitContext&) { 115Id EmitFPLog2(EmitContext& ctx, Id value) {
120 throw NotImplementedException("SPIR-V Instruction"); 116 return ctx.OpLog2(ctx.F32[1], value);
121} 117}
122 118
123void EmitFPSin(EmitContext&) { 119Id EmitFPRecip32(EmitContext& ctx, Id value) {
124 throw NotImplementedException("SPIR-V Instruction"); 120 return ctx.OpFDiv(ctx.F32[1], ctx.Constant(ctx.F32[1], 1.0f), value);
125} 121}
126 122
127void EmitFPSinNotReduced(EmitContext&) { 123Id EmitFPRecip64(EmitContext& ctx, Id value) {
128 throw NotImplementedException("SPIR-V Instruction"); 124 return ctx.OpFDiv(ctx.F64[1], ctx.Constant(ctx.F64[1], 1.0f), value);
129} 125}
130 126
131void EmitFPExp2(EmitContext&) { 127Id EmitFPRecipSqrt32(EmitContext& ctx, Id value) {
132 throw NotImplementedException("SPIR-V Instruction"); 128 return ctx.OpInverseSqrt(ctx.F32[1], value);
133} 129}
134 130
135void EmitFPExp2NotReduced(EmitContext&) { 131Id EmitFPRecipSqrt64(EmitContext& ctx, Id value) {
136 throw NotImplementedException("SPIR-V Instruction"); 132 return ctx.OpInverseSqrt(ctx.F64[1], value);
137} 133}
138 134
139void EmitFPCos(EmitContext&) { 135Id EmitFPSqrt(EmitContext& ctx, Id value) {
140 throw NotImplementedException("SPIR-V Instruction"); 136 return ctx.OpSqrt(ctx.F32[1], value);
141}
142
143void EmitFPCosNotReduced(EmitContext&) {
144 throw NotImplementedException("SPIR-V Instruction");
145}
146
147void EmitFPLog2(EmitContext&) {
148 throw NotImplementedException("SPIR-V Instruction");
149} 137}
150 138
151Id EmitFPSaturate16(EmitContext& ctx, Id value) { 139Id EmitFPSaturate16(EmitContext& ctx, Id value) {
@@ -214,4 +202,148 @@ Id EmitFPTrunc64(EmitContext& ctx, Id value) {
214 return ctx.OpTrunc(ctx.F64[1], value); 202 return ctx.OpTrunc(ctx.F64[1], value);
215} 203}
216 204
205Id EmitFPOrdEqual16(EmitContext& ctx, Id lhs, Id rhs) {
206 return ctx.OpFOrdEqual(ctx.U1, lhs, rhs);
207}
208
209Id EmitFPOrdEqual32(EmitContext& ctx, Id lhs, Id rhs) {
210 return ctx.OpFOrdEqual(ctx.U1, lhs, rhs);
211}
212
213Id EmitFPOrdEqual64(EmitContext& ctx, Id lhs, Id rhs) {
214 return ctx.OpFOrdEqual(ctx.U1, lhs, rhs);
215}
216
217Id EmitFPUnordEqual16(EmitContext& ctx, Id lhs, Id rhs) {
218 return ctx.OpFUnordEqual(ctx.U1, lhs, rhs);
219}
220
221Id EmitFPUnordEqual32(EmitContext& ctx, Id lhs, Id rhs) {
222 return ctx.OpFUnordEqual(ctx.U1, lhs, rhs);
223}
224
225Id EmitFPUnordEqual64(EmitContext& ctx, Id lhs, Id rhs) {
226 return ctx.OpFUnordEqual(ctx.U1, lhs, rhs);
227}
228
229Id EmitFPOrdNotEqual16(EmitContext& ctx, Id lhs, Id rhs) {
230 return ctx.OpFOrdNotEqual(ctx.U1, lhs, rhs);
231}
232
233Id EmitFPOrdNotEqual32(EmitContext& ctx, Id lhs, Id rhs) {
234 return ctx.OpFOrdNotEqual(ctx.U1, lhs, rhs);
235}
236
237Id EmitFPOrdNotEqual64(EmitContext& ctx, Id lhs, Id rhs) {
238 return ctx.OpFOrdNotEqual(ctx.U1, lhs, rhs);
239}
240
241Id EmitFPUnordNotEqual16(EmitContext& ctx, Id lhs, Id rhs) {
242 return ctx.OpFUnordNotEqual(ctx.U1, lhs, rhs);
243}
244
245Id EmitFPUnordNotEqual32(EmitContext& ctx, Id lhs, Id rhs) {
246 return ctx.OpFUnordNotEqual(ctx.U1, lhs, rhs);
247}
248
249Id EmitFPUnordNotEqual64(EmitContext& ctx, Id lhs, Id rhs) {
250 return ctx.OpFUnordNotEqual(ctx.U1, lhs, rhs);
251}
252
253Id EmitFPOrdLessThan16(EmitContext& ctx, Id lhs, Id rhs) {
254 return ctx.OpFOrdLessThan(ctx.U1, lhs, rhs);
255}
256
257Id EmitFPOrdLessThan32(EmitContext& ctx, Id lhs, Id rhs) {
258 return ctx.OpFOrdLessThan(ctx.U1, lhs, rhs);
259}
260
261Id EmitFPOrdLessThan64(EmitContext& ctx, Id lhs, Id rhs) {
262 return ctx.OpFOrdLessThan(ctx.U1, lhs, rhs);
263}
264
265Id EmitFPUnordLessThan16(EmitContext& ctx, Id lhs, Id rhs) {
266 return ctx.OpFUnordLessThan(ctx.U1, lhs, rhs);
267}
268
269Id EmitFPUnordLessThan32(EmitContext& ctx, Id lhs, Id rhs) {
270 return ctx.OpFUnordLessThan(ctx.U1, lhs, rhs);
271}
272
273Id EmitFPUnordLessThan64(EmitContext& ctx, Id lhs, Id rhs) {
274 return ctx.OpFUnordLessThan(ctx.U1, lhs, rhs);
275}
276
277Id EmitFPOrdGreaterThan16(EmitContext& ctx, Id lhs, Id rhs) {
278 return ctx.OpFOrdGreaterThan(ctx.U1, lhs, rhs);
279}
280
281Id EmitFPOrdGreaterThan32(EmitContext& ctx, Id lhs, Id rhs) {
282 return ctx.OpFOrdGreaterThan(ctx.U1, lhs, rhs);
283}
284
285Id EmitFPOrdGreaterThan64(EmitContext& ctx, Id lhs, Id rhs) {
286 return ctx.OpFOrdGreaterThan(ctx.U1, lhs, rhs);
287}
288
289Id EmitFPUnordGreaterThan16(EmitContext& ctx, Id lhs, Id rhs) {
290 return ctx.OpFUnordGreaterThan(ctx.U1, lhs, rhs);
291}
292
293Id EmitFPUnordGreaterThan32(EmitContext& ctx, Id lhs, Id rhs) {
294 return ctx.OpFUnordGreaterThan(ctx.U1, lhs, rhs);
295}
296
297Id EmitFPUnordGreaterThan64(EmitContext& ctx, Id lhs, Id rhs) {
298 return ctx.OpFUnordGreaterThan(ctx.U1, lhs, rhs);
299}
300
301Id EmitFPOrdLessThanEqual16(EmitContext& ctx, Id lhs, Id rhs) {
302 return ctx.OpFOrdLessThanEqual(ctx.U1, lhs, rhs);
303}
304
305Id EmitFPOrdLessThanEqual32(EmitContext& ctx, Id lhs, Id rhs) {
306 return ctx.OpFOrdLessThanEqual(ctx.U1, lhs, rhs);
307}
308
309Id EmitFPOrdLessThanEqual64(EmitContext& ctx, Id lhs, Id rhs) {
310 return ctx.OpFOrdLessThanEqual(ctx.U1, lhs, rhs);
311}
312
313Id EmitFPUnordLessThanEqual16(EmitContext& ctx, Id lhs, Id rhs) {
314 return ctx.OpFUnordLessThanEqual(ctx.U1, lhs, rhs);
315}
316
317Id EmitFPUnordLessThanEqual32(EmitContext& ctx, Id lhs, Id rhs) {
318 return ctx.OpFUnordLessThanEqual(ctx.U1, lhs, rhs);
319}
320
321Id EmitFPUnordLessThanEqual64(EmitContext& ctx, Id lhs, Id rhs) {
322 return ctx.OpFUnordLessThanEqual(ctx.U1, lhs, rhs);
323}
324
325Id EmitFPOrdGreaterThanEqual16(EmitContext& ctx, Id lhs, Id rhs) {
326 return ctx.OpFOrdGreaterThanEqual(ctx.U1, lhs, rhs);
327}
328
329Id EmitFPOrdGreaterThanEqual32(EmitContext& ctx, Id lhs, Id rhs) {
330 return ctx.OpFOrdGreaterThanEqual(ctx.U1, lhs, rhs);
331}
332
333Id EmitFPOrdGreaterThanEqual64(EmitContext& ctx, Id lhs, Id rhs) {
334 return ctx.OpFOrdGreaterThanEqual(ctx.U1, lhs, rhs);
335}
336
337Id EmitFPUnordGreaterThanEqual16(EmitContext& ctx, Id lhs, Id rhs) {
338 return ctx.OpFUnordGreaterThanEqual(ctx.U1, lhs, rhs);
339}
340
341Id EmitFPUnordGreaterThanEqual32(EmitContext& ctx, Id lhs, Id rhs) {
342 return ctx.OpFUnordGreaterThanEqual(ctx.U1, lhs, rhs);
343}
344
345Id EmitFPUnordGreaterThanEqual64(EmitContext& ctx, Id lhs, Id rhs) {
346 return ctx.OpFUnordGreaterThanEqual(ctx.U1, lhs, rhs);
347}
348
217} // namespace Shader::Backend::SPIRV 349} // namespace Shader::Backend::SPIRV
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp
index eb1926a4d..21cca4455 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp
@@ -6,20 +6,29 @@
6 6
7namespace Shader::Backend::SPIRV { 7namespace Shader::Backend::SPIRV {
8 8
9void EmitSelect8(EmitContext&) { 9Id EmitSelectU8([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Id cond,
10 [[maybe_unused]] Id true_value, [[maybe_unused]] Id false_value) {
10 throw NotImplementedException("SPIR-V Instruction"); 11 throw NotImplementedException("SPIR-V Instruction");
11} 12}
12 13
13void EmitSelect16(EmitContext&) { 14Id EmitSelectU16(EmitContext& ctx, Id cond, Id true_value, Id false_value) {
14 throw NotImplementedException("SPIR-V Instruction"); 15 return ctx.OpSelect(ctx.U16, cond, true_value, false_value);
15} 16}
16 17
17Id EmitSelect32(EmitContext& ctx, Id cond, Id true_value, Id false_value) { 18Id EmitSelectU32(EmitContext& ctx, Id cond, Id true_value, Id false_value) {
18 return ctx.OpSelect(ctx.U32[1], cond, true_value, false_value); 19 return ctx.OpSelect(ctx.U32[1], cond, true_value, false_value);
19} 20}
20 21
21void EmitSelect64(EmitContext&) { 22Id EmitSelectU64(EmitContext& ctx, Id cond, Id true_value, Id false_value) {
22 throw NotImplementedException("SPIR-V Instruction"); 23 return ctx.OpSelect(ctx.U64, cond, true_value, false_value);
24}
25
26Id EmitSelectF16(EmitContext& ctx, Id cond, Id true_value, Id false_value) {
27 return ctx.OpSelect(ctx.F16[1], cond, true_value, false_value);
28}
29
30Id EmitSelectF32(EmitContext& ctx, Id cond, Id true_value, Id false_value) {
31 return ctx.OpSelect(ctx.F32[1], cond, true_value, false_value);
23} 32}
24 33
25} // namespace Shader::Backend::SPIRV 34} // namespace Shader::Backend::SPIRV