diff options
| author | 2021-05-03 20:53:00 -0300 | |
|---|---|---|
| committer | 2021-07-22 21:51:30 -0400 | |
| commit | bed090807afd3364ed6ef18a031a0ffd95a1b89b (patch) | |
| tree | 50035e78e75e7237e4cafcf181eb0b3a2f172912 /src/shader_recompiler/backend | |
| parent | shader: Optimize NVN Fallthrough (diff) | |
| download | yuzu-bed090807afd3364ed6ef18a031a0ffd95a1b89b.tar.gz yuzu-bed090807afd3364ed6ef18a031a0ffd95a1b89b.tar.xz yuzu-bed090807afd3364ed6ef18a031a0ffd95a1b89b.zip | |
Move SPIR-V emission functions to their own header
Diffstat (limited to 'src/shader_recompiler/backend')
23 files changed, 629 insertions, 572 deletions
diff --git a/src/shader_recompiler/backend/bindings.h b/src/shader_recompiler/backend/bindings.h new file mode 100644 index 000000000..35503000c --- /dev/null +++ b/src/shader_recompiler/backend/bindings.h | |||
| @@ -0,0 +1,19 @@ | |||
| 1 | // Copyright 2021 yuzu Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #pragma once | ||
| 6 | |||
| 7 | #include "common/common_types.h" | ||
| 8 | |||
| 9 | namespace Shader::Backend { | ||
| 10 | |||
| 11 | struct Bindings { | ||
| 12 | u32 unified{}; | ||
| 13 | u32 uniform_buffer{}; | ||
| 14 | u32 storage_buffer{}; | ||
| 15 | u32 texture{}; | ||
| 16 | u32 image{}; | ||
| 17 | }; | ||
| 18 | |||
| 19 | } // namespace Shader::Backend | ||
diff --git a/src/shader_recompiler/backend/spirv/emit_context.h b/src/shader_recompiler/backend/spirv/emit_context.h index 30b08104d..8b000f1ec 100644 --- a/src/shader_recompiler/backend/spirv/emit_context.h +++ b/src/shader_recompiler/backend/spirv/emit_context.h | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | 9 | ||
| 10 | #include <sirit/sirit.h> | 10 | #include <sirit/sirit.h> |
| 11 | 11 | ||
| 12 | #include "shader_recompiler/backend/bindings.h" | ||
| 12 | #include "shader_recompiler/frontend/ir/program.h" | 13 | #include "shader_recompiler/frontend/ir/program.h" |
| 13 | #include "shader_recompiler/profile.h" | 14 | #include "shader_recompiler/profile.h" |
| 14 | #include "shader_recompiler/shader_info.h" | 15 | #include "shader_recompiler/shader_info.h" |
| @@ -17,14 +18,6 @@ namespace Shader::Backend::SPIRV { | |||
| 17 | 18 | ||
| 18 | using Sirit::Id; | 19 | using Sirit::Id; |
| 19 | 20 | ||
| 20 | struct Bindings { | ||
| 21 | u32 unified{}; | ||
| 22 | u32 uniform_buffer{}; | ||
| 23 | u32 storage_buffer{}; | ||
| 24 | u32 texture{}; | ||
| 25 | u32 image{}; | ||
| 26 | }; | ||
| 27 | |||
| 28 | class VectorTypes { | 21 | class VectorTypes { |
| 29 | public: | 22 | public: |
| 30 | void Define(Sirit::Module& sirit_ctx, Id base_type, std::string_view name); | 23 | void Define(Sirit::Module& sirit_ctx, Id base_type, std::string_view name); |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp index 3f9adc902..0681dfd16 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | #include <vector> | 9 | #include <vector> |
| 10 | 10 | ||
| 11 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 11 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 12 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 12 | #include "shader_recompiler/frontend/ir/basic_block.h" | 13 | #include "shader_recompiler/frontend/ir/basic_block.h" |
| 13 | #include "shader_recompiler/frontend/ir/program.h" | 14 | #include "shader_recompiler/frontend/ir/program.h" |
| 14 | 15 | ||
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h index 47d62b190..d8ab2d8ed 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv.h | |||
| @@ -4,9 +4,12 @@ | |||
| 4 | 4 | ||
| 5 | #pragma once | 5 | #pragma once |
| 6 | 6 | ||
| 7 | #include <vector> | ||
| 8 | |||
| 7 | #include <sirit/sirit.h> | 9 | #include <sirit/sirit.h> |
| 8 | 10 | ||
| 9 | #include "common/common_types.h" | 11 | #include "common/common_types.h" |
| 12 | #include "shader_recompiler/backend/bindings.h" | ||
| 10 | #include "shader_recompiler/backend/spirv/emit_context.h" | 13 | #include "shader_recompiler/backend/spirv/emit_context.h" |
| 11 | #include "shader_recompiler/frontend/ir/program.h" | 14 | #include "shader_recompiler/frontend/ir/program.h" |
| 12 | #include "shader_recompiler/profile.h" | 15 | #include "shader_recompiler/profile.h" |
| @@ -16,569 +19,9 @@ namespace Shader::Backend::SPIRV { | |||
| 16 | [[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program, | 19 | [[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program, |
| 17 | Bindings& binding); | 20 | Bindings& binding); |
| 18 | 21 | ||
| 19 | // Microinstruction emitters | 22 | [[nodiscard]] inline std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program) { |
| 20 | Id EmitPhi(EmitContext& ctx, IR::Inst* inst); | 23 | Bindings binding; |
| 21 | void EmitVoid(EmitContext& ctx); | 24 | return EmitSPIRV(profile, program, binding); |
| 22 | Id EmitIdentity(EmitContext& ctx, const IR::Value& value); | 25 | } |
| 23 | void EmitBranch(EmitContext& ctx, Id label); | ||
| 24 | void EmitBranchConditional(EmitContext& ctx, Id condition, Id true_label, Id false_label); | ||
| 25 | void EmitLoopMerge(EmitContext& ctx, Id merge_label, Id continue_label); | ||
| 26 | void EmitSelectionMerge(EmitContext& ctx, Id merge_label); | ||
| 27 | void EmitReturn(EmitContext& ctx); | ||
| 28 | void EmitJoin(EmitContext& ctx); | ||
| 29 | void EmitUnreachable(EmitContext& ctx); | ||
| 30 | void EmitDemoteToHelperInvocation(EmitContext& ctx, Id continue_label); | ||
| 31 | void EmitBarrier(EmitContext& ctx); | ||
| 32 | void EmitWorkgroupMemoryBarrier(EmitContext& ctx); | ||
| 33 | void EmitDeviceMemoryBarrier(EmitContext& ctx); | ||
| 34 | void EmitPrologue(EmitContext& ctx); | ||
| 35 | void EmitEpilogue(EmitContext& ctx); | ||
| 36 | void EmitEmitVertex(EmitContext& ctx, const IR::Value& stream); | ||
| 37 | void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream); | ||
| 38 | void EmitGetRegister(EmitContext& ctx); | ||
| 39 | void EmitSetRegister(EmitContext& ctx); | ||
| 40 | void EmitGetPred(EmitContext& ctx); | ||
| 41 | void EmitSetPred(EmitContext& ctx); | ||
| 42 | void EmitSetGotoVariable(EmitContext& ctx); | ||
| 43 | void EmitGetGotoVariable(EmitContext& ctx); | ||
| 44 | void EmitSetIndirectBranchVariable(EmitContext& ctx); | ||
| 45 | void EmitGetIndirectBranchVariable(EmitContext& ctx); | ||
| 46 | Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 47 | Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 48 | Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 49 | Id EmitGetCbufS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 50 | Id EmitGetCbufU32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 51 | Id EmitGetCbufF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 52 | Id EmitGetCbufU32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 53 | Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, Id vertex); | ||
| 54 | void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, Id value, Id vertex); | ||
| 55 | Id EmitGetAttributeIndexed(EmitContext& ctx, Id offset, Id vertex); | ||
| 56 | void EmitSetAttributeIndexed(EmitContext& ctx, Id offset, Id value, Id vertex); | ||
| 57 | Id EmitGetPatch(EmitContext& ctx, IR::Patch patch); | ||
| 58 | void EmitSetPatch(EmitContext& ctx, IR::Patch patch, Id value); | ||
| 59 | void EmitSetFragColor(EmitContext& ctx, u32 index, u32 component, Id value); | ||
| 60 | void EmitSetSampleMask(EmitContext& ctx, Id value); | ||
| 61 | void EmitSetFragDepth(EmitContext& ctx, Id value); | ||
| 62 | void EmitGetZFlag(EmitContext& ctx); | ||
| 63 | void EmitGetSFlag(EmitContext& ctx); | ||
| 64 | void EmitGetCFlag(EmitContext& ctx); | ||
| 65 | void EmitGetOFlag(EmitContext& ctx); | ||
| 66 | void EmitSetZFlag(EmitContext& ctx); | ||
| 67 | void EmitSetSFlag(EmitContext& ctx); | ||
| 68 | void EmitSetCFlag(EmitContext& ctx); | ||
| 69 | void EmitSetOFlag(EmitContext& ctx); | ||
| 70 | Id EmitWorkgroupId(EmitContext& ctx); | ||
| 71 | Id EmitLocalInvocationId(EmitContext& ctx); | ||
| 72 | Id EmitInvocationId(EmitContext& ctx); | ||
| 73 | Id EmitSampleId(EmitContext& ctx); | ||
| 74 | Id EmitIsHelperInvocation(EmitContext& ctx); | ||
| 75 | Id EmitYDirection(EmitContext& ctx); | ||
| 76 | Id EmitLoadLocal(EmitContext& ctx, Id word_offset); | ||
| 77 | void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value); | ||
| 78 | Id EmitUndefU1(EmitContext& ctx); | ||
| 79 | Id EmitUndefU8(EmitContext& ctx); | ||
| 80 | Id EmitUndefU16(EmitContext& ctx); | ||
| 81 | Id EmitUndefU32(EmitContext& ctx); | ||
| 82 | Id EmitUndefU64(EmitContext& ctx); | ||
| 83 | void EmitLoadGlobalU8(EmitContext& ctx); | ||
| 84 | void EmitLoadGlobalS8(EmitContext& ctx); | ||
| 85 | void EmitLoadGlobalU16(EmitContext& ctx); | ||
| 86 | void EmitLoadGlobalS16(EmitContext& ctx); | ||
| 87 | Id EmitLoadGlobal32(EmitContext& ctx, Id address); | ||
| 88 | Id EmitLoadGlobal64(EmitContext& ctx, Id address); | ||
| 89 | Id EmitLoadGlobal128(EmitContext& ctx, Id address); | ||
| 90 | void EmitWriteGlobalU8(EmitContext& ctx); | ||
| 91 | void EmitWriteGlobalS8(EmitContext& ctx); | ||
| 92 | void EmitWriteGlobalU16(EmitContext& ctx); | ||
| 93 | void EmitWriteGlobalS16(EmitContext& ctx); | ||
| 94 | void EmitWriteGlobal32(EmitContext& ctx, Id address, Id value); | ||
| 95 | void EmitWriteGlobal64(EmitContext& ctx, Id address, Id value); | ||
| 96 | void EmitWriteGlobal128(EmitContext& ctx, Id address, Id value); | ||
| 97 | Id EmitLoadStorageU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 98 | Id EmitLoadStorageS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 99 | Id EmitLoadStorageU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 100 | Id EmitLoadStorageS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 101 | Id EmitLoadStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 102 | Id EmitLoadStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 103 | Id EmitLoadStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 104 | void EmitWriteStorageU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 105 | Id value); | ||
| 106 | void EmitWriteStorageS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 107 | Id value); | ||
| 108 | void EmitWriteStorageU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 109 | Id value); | ||
| 110 | void EmitWriteStorageS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 111 | Id value); | ||
| 112 | void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 113 | Id value); | ||
| 114 | void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 115 | Id value); | ||
| 116 | void EmitWriteStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 117 | Id value); | ||
| 118 | Id EmitLoadSharedU8(EmitContext& ctx, Id offset); | ||
| 119 | Id EmitLoadSharedS8(EmitContext& ctx, Id offset); | ||
| 120 | Id EmitLoadSharedU16(EmitContext& ctx, Id offset); | ||
| 121 | Id EmitLoadSharedS16(EmitContext& ctx, Id offset); | ||
| 122 | Id EmitLoadSharedU32(EmitContext& ctx, Id offset); | ||
| 123 | Id EmitLoadSharedU64(EmitContext& ctx, Id offset); | ||
| 124 | Id EmitLoadSharedU128(EmitContext& ctx, Id offset); | ||
| 125 | void EmitWriteSharedU8(EmitContext& ctx, Id offset, Id value); | ||
| 126 | void EmitWriteSharedU16(EmitContext& ctx, Id offset, Id value); | ||
| 127 | void EmitWriteSharedU32(EmitContext& ctx, Id offset, Id value); | ||
| 128 | void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value); | ||
| 129 | void EmitWriteSharedU128(EmitContext& ctx, Id offset, Id value); | ||
| 130 | Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2); | ||
| 131 | Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3); | ||
| 132 | Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4); | ||
| 133 | Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index); | ||
| 134 | Id EmitCompositeExtractU32x3(EmitContext& ctx, Id composite, u32 index); | ||
| 135 | Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index); | ||
| 136 | Id EmitCompositeInsertU32x2(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 137 | Id EmitCompositeInsertU32x3(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 138 | Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 139 | Id EmitCompositeConstructF16x2(EmitContext& ctx, Id e1, Id e2); | ||
| 140 | Id EmitCompositeConstructF16x3(EmitContext& ctx, Id e1, Id e2, Id e3); | ||
| 141 | Id EmitCompositeConstructF16x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4); | ||
| 142 | Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index); | ||
| 143 | Id EmitCompositeExtractF16x3(EmitContext& ctx, Id composite, u32 index); | ||
| 144 | Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index); | ||
| 145 | Id EmitCompositeInsertF16x2(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 146 | Id EmitCompositeInsertF16x3(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 147 | Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 148 | Id EmitCompositeConstructF32x2(EmitContext& ctx, Id e1, Id e2); | ||
| 149 | Id EmitCompositeConstructF32x3(EmitContext& ctx, Id e1, Id e2, Id e3); | ||
| 150 | Id EmitCompositeConstructF32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4); | ||
| 151 | Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index); | ||
| 152 | Id EmitCompositeExtractF32x3(EmitContext& ctx, Id composite, u32 index); | ||
| 153 | Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index); | ||
| 154 | Id EmitCompositeInsertF32x2(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 155 | Id EmitCompositeInsertF32x3(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 156 | Id EmitCompositeInsertF32x4(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 157 | void EmitCompositeConstructF64x2(EmitContext& ctx); | ||
| 158 | void EmitCompositeConstructF64x3(EmitContext& ctx); | ||
| 159 | void EmitCompositeConstructF64x4(EmitContext& ctx); | ||
| 160 | void EmitCompositeExtractF64x2(EmitContext& ctx); | ||
| 161 | void EmitCompositeExtractF64x3(EmitContext& ctx); | ||
| 162 | void EmitCompositeExtractF64x4(EmitContext& ctx); | ||
| 163 | Id EmitCompositeInsertF64x2(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 164 | Id EmitCompositeInsertF64x3(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 165 | Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 166 | Id EmitSelectU1(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 167 | Id EmitSelectU8(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 168 | Id EmitSelectU16(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 169 | Id EmitSelectU32(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 170 | Id EmitSelectU64(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 171 | Id EmitSelectF16(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 172 | Id EmitSelectF32(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 173 | Id EmitSelectF64(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 174 | void EmitBitCastU16F16(EmitContext& ctx); | ||
| 175 | Id EmitBitCastU32F32(EmitContext& ctx, Id value); | ||
| 176 | void EmitBitCastU64F64(EmitContext& ctx); | ||
| 177 | void EmitBitCastF16U16(EmitContext& ctx); | ||
| 178 | Id EmitBitCastF32U32(EmitContext& ctx, Id value); | ||
| 179 | void EmitBitCastF64U64(EmitContext& ctx); | ||
| 180 | Id EmitPackUint2x32(EmitContext& ctx, Id value); | ||
| 181 | Id EmitUnpackUint2x32(EmitContext& ctx, Id value); | ||
| 182 | Id EmitPackFloat2x16(EmitContext& ctx, Id value); | ||
| 183 | Id EmitUnpackFloat2x16(EmitContext& ctx, Id value); | ||
| 184 | Id EmitPackHalf2x16(EmitContext& ctx, Id value); | ||
| 185 | Id EmitUnpackHalf2x16(EmitContext& ctx, Id value); | ||
| 186 | Id EmitPackDouble2x32(EmitContext& ctx, Id value); | ||
| 187 | Id EmitUnpackDouble2x32(EmitContext& ctx, Id value); | ||
| 188 | void EmitGetZeroFromOp(EmitContext& ctx); | ||
| 189 | void EmitGetSignFromOp(EmitContext& ctx); | ||
| 190 | void EmitGetCarryFromOp(EmitContext& ctx); | ||
| 191 | void EmitGetOverflowFromOp(EmitContext& ctx); | ||
| 192 | void EmitGetSparseFromOp(EmitContext& ctx); | ||
| 193 | void EmitGetInBoundsFromOp(EmitContext& ctx); | ||
| 194 | Id EmitFPAbs16(EmitContext& ctx, Id value); | ||
| 195 | Id EmitFPAbs32(EmitContext& ctx, Id value); | ||
| 196 | Id EmitFPAbs64(EmitContext& ctx, Id value); | ||
| 197 | Id EmitFPAdd16(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 198 | Id EmitFPAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 199 | Id EmitFPAdd64(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 200 | Id EmitFPFma16(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c); | ||
| 201 | Id EmitFPFma32(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c); | ||
| 202 | Id EmitFPFma64(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c); | ||
| 203 | Id EmitFPMax32(EmitContext& ctx, Id a, Id b); | ||
| 204 | Id EmitFPMax64(EmitContext& ctx, Id a, Id b); | ||
| 205 | Id EmitFPMin32(EmitContext& ctx, Id a, Id b); | ||
| 206 | Id EmitFPMin64(EmitContext& ctx, Id a, Id b); | ||
| 207 | Id EmitFPMul16(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 208 | Id EmitFPMul32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 209 | Id EmitFPMul64(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 210 | Id EmitFPNeg16(EmitContext& ctx, Id value); | ||
| 211 | Id EmitFPNeg32(EmitContext& ctx, Id value); | ||
| 212 | Id EmitFPNeg64(EmitContext& ctx, Id value); | ||
| 213 | Id EmitFPSin(EmitContext& ctx, Id value); | ||
| 214 | Id EmitFPCos(EmitContext& ctx, Id value); | ||
| 215 | Id EmitFPExp2(EmitContext& ctx, Id value); | ||
| 216 | Id EmitFPLog2(EmitContext& ctx, Id value); | ||
| 217 | Id EmitFPRecip32(EmitContext& ctx, Id value); | ||
| 218 | Id EmitFPRecip64(EmitContext& ctx, Id value); | ||
| 219 | Id EmitFPRecipSqrt32(EmitContext& ctx, Id value); | ||
| 220 | Id EmitFPRecipSqrt64(EmitContext& ctx, Id value); | ||
| 221 | Id EmitFPSqrt(EmitContext& ctx, Id value); | ||
| 222 | Id EmitFPSaturate16(EmitContext& ctx, Id value); | ||
| 223 | Id EmitFPSaturate32(EmitContext& ctx, Id value); | ||
| 224 | Id EmitFPSaturate64(EmitContext& ctx, Id value); | ||
| 225 | Id EmitFPClamp16(EmitContext& ctx, Id value, Id min_value, Id max_value); | ||
| 226 | Id EmitFPClamp32(EmitContext& ctx, Id value, Id min_value, Id max_value); | ||
| 227 | Id EmitFPClamp64(EmitContext& ctx, Id value, Id min_value, Id max_value); | ||
| 228 | Id EmitFPRoundEven16(EmitContext& ctx, Id value); | ||
| 229 | Id EmitFPRoundEven32(EmitContext& ctx, Id value); | ||
| 230 | Id EmitFPRoundEven64(EmitContext& ctx, Id value); | ||
| 231 | Id EmitFPFloor16(EmitContext& ctx, Id value); | ||
| 232 | Id EmitFPFloor32(EmitContext& ctx, Id value); | ||
| 233 | Id EmitFPFloor64(EmitContext& ctx, Id value); | ||
| 234 | Id EmitFPCeil16(EmitContext& ctx, Id value); | ||
| 235 | Id EmitFPCeil32(EmitContext& ctx, Id value); | ||
| 236 | Id EmitFPCeil64(EmitContext& ctx, Id value); | ||
| 237 | Id EmitFPTrunc16(EmitContext& ctx, Id value); | ||
| 238 | Id EmitFPTrunc32(EmitContext& ctx, Id value); | ||
| 239 | Id EmitFPTrunc64(EmitContext& ctx, Id value); | ||
| 240 | Id EmitFPOrdEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 241 | Id EmitFPOrdEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 242 | Id EmitFPOrdEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 243 | Id EmitFPUnordEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 244 | Id EmitFPUnordEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 245 | Id EmitFPUnordEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 246 | Id EmitFPOrdNotEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 247 | Id EmitFPOrdNotEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 248 | Id EmitFPOrdNotEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 249 | Id EmitFPUnordNotEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 250 | Id EmitFPUnordNotEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 251 | Id EmitFPUnordNotEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 252 | Id EmitFPOrdLessThan16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 253 | Id EmitFPOrdLessThan32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 254 | Id EmitFPOrdLessThan64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 255 | Id EmitFPUnordLessThan16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 256 | Id EmitFPUnordLessThan32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 257 | Id EmitFPUnordLessThan64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 258 | Id EmitFPOrdGreaterThan16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 259 | Id EmitFPOrdGreaterThan32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 260 | Id EmitFPOrdGreaterThan64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 261 | Id EmitFPUnordGreaterThan16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 262 | Id EmitFPUnordGreaterThan32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 263 | Id EmitFPUnordGreaterThan64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 264 | Id EmitFPOrdLessThanEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 265 | Id EmitFPOrdLessThanEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 266 | Id EmitFPOrdLessThanEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 267 | Id EmitFPUnordLessThanEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 268 | Id EmitFPUnordLessThanEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 269 | Id EmitFPUnordLessThanEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 270 | Id EmitFPOrdGreaterThanEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 271 | Id EmitFPOrdGreaterThanEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 272 | Id EmitFPOrdGreaterThanEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 273 | Id EmitFPUnordGreaterThanEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 274 | Id EmitFPUnordGreaterThanEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 275 | Id EmitFPUnordGreaterThanEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 276 | Id EmitFPIsNan16(EmitContext& ctx, Id value); | ||
| 277 | Id EmitFPIsNan32(EmitContext& ctx, Id value); | ||
| 278 | Id EmitFPIsNan64(EmitContext& ctx, Id value); | ||
| 279 | Id EmitIAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 280 | Id EmitIAdd64(EmitContext& ctx, Id a, Id b); | ||
| 281 | Id EmitISub32(EmitContext& ctx, Id a, Id b); | ||
| 282 | Id EmitISub64(EmitContext& ctx, Id a, Id b); | ||
| 283 | Id EmitIMul32(EmitContext& ctx, Id a, Id b); | ||
| 284 | Id EmitINeg32(EmitContext& ctx, Id value); | ||
| 285 | Id EmitINeg64(EmitContext& ctx, Id value); | ||
| 286 | Id EmitIAbs32(EmitContext& ctx, Id value); | ||
| 287 | Id EmitIAbs64(EmitContext& ctx, Id value); | ||
| 288 | Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift); | ||
| 289 | Id EmitShiftLeftLogical64(EmitContext& ctx, Id base, Id shift); | ||
| 290 | Id EmitShiftRightLogical32(EmitContext& ctx, Id base, Id shift); | ||
| 291 | Id EmitShiftRightLogical64(EmitContext& ctx, Id base, Id shift); | ||
| 292 | Id EmitShiftRightArithmetic32(EmitContext& ctx, Id base, Id shift); | ||
| 293 | Id EmitShiftRightArithmetic64(EmitContext& ctx, Id base, Id shift); | ||
| 294 | Id EmitBitwiseAnd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 295 | Id EmitBitwiseOr32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 296 | Id EmitBitwiseXor32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 297 | Id EmitBitFieldInsert(EmitContext& ctx, Id base, Id insert, Id offset, Id count); | ||
| 298 | Id EmitBitFieldSExtract(EmitContext& ctx, IR::Inst* inst, Id base, Id offset, Id count); | ||
| 299 | Id EmitBitFieldUExtract(EmitContext& ctx, IR::Inst* inst, Id base, Id offset, Id count); | ||
| 300 | Id EmitBitReverse32(EmitContext& ctx, Id value); | ||
| 301 | Id EmitBitCount32(EmitContext& ctx, Id value); | ||
| 302 | Id EmitBitwiseNot32(EmitContext& ctx, Id value); | ||
| 303 | Id EmitFindSMsb32(EmitContext& ctx, Id value); | ||
| 304 | Id EmitFindUMsb32(EmitContext& ctx, Id value); | ||
| 305 | Id EmitSMin32(EmitContext& ctx, Id a, Id b); | ||
| 306 | Id EmitUMin32(EmitContext& ctx, Id a, Id b); | ||
| 307 | Id EmitSMax32(EmitContext& ctx, Id a, Id b); | ||
| 308 | Id EmitUMax32(EmitContext& ctx, Id a, Id b); | ||
| 309 | Id EmitSClamp32(EmitContext& ctx, IR::Inst* inst, Id value, Id min, Id max); | ||
| 310 | Id EmitUClamp32(EmitContext& ctx, IR::Inst* inst, Id value, Id min, Id max); | ||
| 311 | Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs); | ||
| 312 | Id EmitULessThan(EmitContext& ctx, Id lhs, Id rhs); | ||
| 313 | Id EmitIEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 314 | Id EmitSLessThanEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 315 | Id EmitULessThanEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 316 | Id EmitSGreaterThan(EmitContext& ctx, Id lhs, Id rhs); | ||
| 317 | Id EmitUGreaterThan(EmitContext& ctx, Id lhs, Id rhs); | ||
| 318 | Id EmitINotEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 319 | Id EmitSGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 320 | Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 321 | Id EmitSharedAtomicIAdd32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 322 | Id EmitSharedAtomicSMin32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 323 | Id EmitSharedAtomicUMin32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 324 | Id EmitSharedAtomicSMax32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 325 | Id EmitSharedAtomicUMax32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 326 | Id EmitSharedAtomicInc32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 327 | Id EmitSharedAtomicDec32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 328 | Id EmitSharedAtomicAnd32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 329 | Id EmitSharedAtomicOr32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 330 | Id EmitSharedAtomicXor32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 331 | Id EmitSharedAtomicExchange32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 332 | Id EmitSharedAtomicExchange64(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 333 | Id EmitStorageAtomicIAdd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 334 | Id value); | ||
| 335 | Id EmitStorageAtomicSMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 336 | Id value); | ||
| 337 | Id EmitStorageAtomicUMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 338 | Id value); | ||
| 339 | Id EmitStorageAtomicSMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 340 | Id value); | ||
| 341 | Id EmitStorageAtomicUMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 342 | Id value); | ||
| 343 | Id EmitStorageAtomicInc32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 344 | Id value); | ||
| 345 | Id EmitStorageAtomicDec32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 346 | Id value); | ||
| 347 | Id EmitStorageAtomicAnd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 348 | Id value); | ||
| 349 | Id EmitStorageAtomicOr32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 350 | Id value); | ||
| 351 | Id EmitStorageAtomicXor32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 352 | Id value); | ||
| 353 | Id EmitStorageAtomicExchange32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 354 | Id value); | ||
| 355 | Id EmitStorageAtomicIAdd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 356 | Id value); | ||
| 357 | Id EmitStorageAtomicSMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 358 | Id value); | ||
| 359 | Id EmitStorageAtomicUMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 360 | Id value); | ||
| 361 | Id EmitStorageAtomicSMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 362 | Id value); | ||
| 363 | Id EmitStorageAtomicUMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 364 | Id value); | ||
| 365 | Id EmitStorageAtomicAnd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 366 | Id value); | ||
| 367 | Id EmitStorageAtomicOr64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 368 | Id value); | ||
| 369 | Id EmitStorageAtomicXor64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 370 | Id value); | ||
| 371 | Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 372 | Id value); | ||
| 373 | Id EmitStorageAtomicAddF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 374 | Id value); | ||
| 375 | Id EmitStorageAtomicAddF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 376 | Id value); | ||
| 377 | Id EmitStorageAtomicAddF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 378 | Id value); | ||
| 379 | Id EmitStorageAtomicMinF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 380 | Id value); | ||
| 381 | Id EmitStorageAtomicMinF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 382 | Id value); | ||
| 383 | Id EmitStorageAtomicMaxF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 384 | Id value); | ||
| 385 | Id EmitStorageAtomicMaxF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 386 | Id value); | ||
| 387 | Id EmitGlobalAtomicIAdd32(EmitContext& ctx); | ||
| 388 | Id EmitGlobalAtomicSMin32(EmitContext& ctx); | ||
| 389 | Id EmitGlobalAtomicUMin32(EmitContext& ctx); | ||
| 390 | Id EmitGlobalAtomicSMax32(EmitContext& ctx); | ||
| 391 | Id EmitGlobalAtomicUMax32(EmitContext& ctx); | ||
| 392 | Id EmitGlobalAtomicInc32(EmitContext& ctx); | ||
| 393 | Id EmitGlobalAtomicDec32(EmitContext& ctx); | ||
| 394 | Id EmitGlobalAtomicAnd32(EmitContext& ctx); | ||
| 395 | Id EmitGlobalAtomicOr32(EmitContext& ctx); | ||
| 396 | Id EmitGlobalAtomicXor32(EmitContext& ctx); | ||
| 397 | Id EmitGlobalAtomicExchange32(EmitContext& ctx); | ||
| 398 | Id EmitGlobalAtomicIAdd64(EmitContext& ctx); | ||
| 399 | Id EmitGlobalAtomicSMin64(EmitContext& ctx); | ||
| 400 | Id EmitGlobalAtomicUMin64(EmitContext& ctx); | ||
| 401 | Id EmitGlobalAtomicSMax64(EmitContext& ctx); | ||
| 402 | Id EmitGlobalAtomicUMax64(EmitContext& ctx); | ||
| 403 | Id EmitGlobalAtomicInc64(EmitContext& ctx); | ||
| 404 | Id EmitGlobalAtomicDec64(EmitContext& ctx); | ||
| 405 | Id EmitGlobalAtomicAnd64(EmitContext& ctx); | ||
| 406 | Id EmitGlobalAtomicOr64(EmitContext& ctx); | ||
| 407 | Id EmitGlobalAtomicXor64(EmitContext& ctx); | ||
| 408 | Id EmitGlobalAtomicExchange64(EmitContext& ctx); | ||
| 409 | Id EmitGlobalAtomicAddF32(EmitContext& ctx); | ||
| 410 | Id EmitGlobalAtomicAddF16x2(EmitContext& ctx); | ||
| 411 | Id EmitGlobalAtomicAddF32x2(EmitContext& ctx); | ||
| 412 | Id EmitGlobalAtomicMinF16x2(EmitContext& ctx); | ||
| 413 | Id EmitGlobalAtomicMinF32x2(EmitContext& ctx); | ||
| 414 | Id EmitGlobalAtomicMaxF16x2(EmitContext& ctx); | ||
| 415 | Id EmitGlobalAtomicMaxF32x2(EmitContext& ctx); | ||
| 416 | Id EmitLogicalOr(EmitContext& ctx, Id a, Id b); | ||
| 417 | Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b); | ||
| 418 | Id EmitLogicalXor(EmitContext& ctx, Id a, Id b); | ||
| 419 | Id EmitLogicalNot(EmitContext& ctx, Id value); | ||
| 420 | Id EmitConvertS16F16(EmitContext& ctx, Id value); | ||
| 421 | Id EmitConvertS16F32(EmitContext& ctx, Id value); | ||
| 422 | Id EmitConvertS16F64(EmitContext& ctx, Id value); | ||
| 423 | Id EmitConvertS32F16(EmitContext& ctx, Id value); | ||
| 424 | Id EmitConvertS32F32(EmitContext& ctx, Id value); | ||
| 425 | Id EmitConvertS32F64(EmitContext& ctx, Id value); | ||
| 426 | Id EmitConvertS64F16(EmitContext& ctx, Id value); | ||
| 427 | Id EmitConvertS64F32(EmitContext& ctx, Id value); | ||
| 428 | Id EmitConvertS64F64(EmitContext& ctx, Id value); | ||
| 429 | Id EmitConvertU16F16(EmitContext& ctx, Id value); | ||
| 430 | Id EmitConvertU16F32(EmitContext& ctx, Id value); | ||
| 431 | Id EmitConvertU16F64(EmitContext& ctx, Id value); | ||
| 432 | Id EmitConvertU32F16(EmitContext& ctx, Id value); | ||
| 433 | Id EmitConvertU32F32(EmitContext& ctx, Id value); | ||
| 434 | Id EmitConvertU32F64(EmitContext& ctx, Id value); | ||
| 435 | Id EmitConvertU64F16(EmitContext& ctx, Id value); | ||
| 436 | Id EmitConvertU64F32(EmitContext& ctx, Id value); | ||
| 437 | Id EmitConvertU64F64(EmitContext& ctx, Id value); | ||
| 438 | Id EmitConvertU64U32(EmitContext& ctx, Id value); | ||
| 439 | Id EmitConvertU32U64(EmitContext& ctx, Id value); | ||
| 440 | Id EmitConvertF16F32(EmitContext& ctx, Id value); | ||
| 441 | Id EmitConvertF32F16(EmitContext& ctx, Id value); | ||
| 442 | Id EmitConvertF32F64(EmitContext& ctx, Id value); | ||
| 443 | Id EmitConvertF64F32(EmitContext& ctx, Id value); | ||
| 444 | Id EmitConvertF16S8(EmitContext& ctx, Id value); | ||
| 445 | Id EmitConvertF16S16(EmitContext& ctx, Id value); | ||
| 446 | Id EmitConvertF16S32(EmitContext& ctx, Id value); | ||
| 447 | Id EmitConvertF16S64(EmitContext& ctx, Id value); | ||
| 448 | Id EmitConvertF16U8(EmitContext& ctx, Id value); | ||
| 449 | Id EmitConvertF16U16(EmitContext& ctx, Id value); | ||
| 450 | Id EmitConvertF16U32(EmitContext& ctx, Id value); | ||
| 451 | Id EmitConvertF16U64(EmitContext& ctx, Id value); | ||
| 452 | Id EmitConvertF32S8(EmitContext& ctx, Id value); | ||
| 453 | Id EmitConvertF32S16(EmitContext& ctx, Id value); | ||
| 454 | Id EmitConvertF32S32(EmitContext& ctx, Id value); | ||
| 455 | Id EmitConvertF32S64(EmitContext& ctx, Id value); | ||
| 456 | Id EmitConvertF32U8(EmitContext& ctx, Id value); | ||
| 457 | Id EmitConvertF32U16(EmitContext& ctx, Id value); | ||
| 458 | Id EmitConvertF32U32(EmitContext& ctx, Id value); | ||
| 459 | Id EmitConvertF32U64(EmitContext& ctx, Id value); | ||
| 460 | Id EmitConvertF64S8(EmitContext& ctx, Id value); | ||
| 461 | Id EmitConvertF64S16(EmitContext& ctx, Id value); | ||
| 462 | Id EmitConvertF64S32(EmitContext& ctx, Id value); | ||
| 463 | Id EmitConvertF64S64(EmitContext& ctx, Id value); | ||
| 464 | Id EmitConvertF64U8(EmitContext& ctx, Id value); | ||
| 465 | Id EmitConvertF64U16(EmitContext& ctx, Id value); | ||
| 466 | Id EmitConvertF64U32(EmitContext& ctx, Id value); | ||
| 467 | Id EmitConvertF64U64(EmitContext& ctx, Id value); | ||
| 468 | Id EmitBindlessImageSampleImplicitLod(EmitContext&); | ||
| 469 | Id EmitBindlessImageSampleExplicitLod(EmitContext&); | ||
| 470 | Id EmitBindlessImageSampleDrefImplicitLod(EmitContext&); | ||
| 471 | Id EmitBindlessImageSampleDrefExplicitLod(EmitContext&); | ||
| 472 | Id EmitBindlessImageGather(EmitContext&); | ||
| 473 | Id EmitBindlessImageGatherDref(EmitContext&); | ||
| 474 | Id EmitBindlessImageFetch(EmitContext&); | ||
| 475 | Id EmitBindlessImageQueryDimensions(EmitContext&); | ||
| 476 | Id EmitBindlessImageQueryLod(EmitContext&); | ||
| 477 | Id EmitBindlessImageGradient(EmitContext&); | ||
| 478 | Id EmitBindlessImageRead(EmitContext&); | ||
| 479 | Id EmitBindlessImageWrite(EmitContext&); | ||
| 480 | Id EmitBoundImageSampleImplicitLod(EmitContext&); | ||
| 481 | Id EmitBoundImageSampleExplicitLod(EmitContext&); | ||
| 482 | Id EmitBoundImageSampleDrefImplicitLod(EmitContext&); | ||
| 483 | Id EmitBoundImageSampleDrefExplicitLod(EmitContext&); | ||
| 484 | Id EmitBoundImageGather(EmitContext&); | ||
| 485 | Id EmitBoundImageGatherDref(EmitContext&); | ||
| 486 | Id EmitBoundImageFetch(EmitContext&); | ||
| 487 | Id EmitBoundImageQueryDimensions(EmitContext&); | ||
| 488 | Id EmitBoundImageQueryLod(EmitContext&); | ||
| 489 | Id EmitBoundImageGradient(EmitContext&); | ||
| 490 | Id EmitBoundImageRead(EmitContext&); | ||
| 491 | Id EmitBoundImageWrite(EmitContext&); | ||
| 492 | Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 493 | Id bias_lc, const IR::Value& offset); | ||
| 494 | Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 495 | Id lod_lc, const IR::Value& offset); | ||
| 496 | Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, | ||
| 497 | Id coords, Id dref, Id bias_lc, const IR::Value& offset); | ||
| 498 | Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, | ||
| 499 | Id coords, Id dref, Id lod_lc, const IR::Value& offset); | ||
| 500 | Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 501 | const IR::Value& offset, const IR::Value& offset2); | ||
| 502 | Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 503 | const IR::Value& offset, const IR::Value& offset2, Id dref); | ||
| 504 | Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset, | ||
| 505 | Id lod, Id ms); | ||
| 506 | Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id lod); | ||
| 507 | Id EmitImageQueryLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords); | ||
| 508 | Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 509 | Id derivates, Id offset, Id lod_clamp); | ||
| 510 | Id EmitImageRead(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords); | ||
| 511 | void EmitImageWrite(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id color); | ||
| 512 | Id EmitBindlessImageAtomicIAdd32(EmitContext&); | ||
| 513 | Id EmitBindlessImageAtomicSMin32(EmitContext&); | ||
| 514 | Id EmitBindlessImageAtomicUMin32(EmitContext&); | ||
| 515 | Id EmitBindlessImageAtomicSMax32(EmitContext&); | ||
| 516 | Id EmitBindlessImageAtomicUMax32(EmitContext&); | ||
| 517 | Id EmitBindlessImageAtomicInc32(EmitContext&); | ||
| 518 | Id EmitBindlessImageAtomicDec32(EmitContext&); | ||
| 519 | Id EmitBindlessImageAtomicAnd32(EmitContext&); | ||
| 520 | Id EmitBindlessImageAtomicOr32(EmitContext&); | ||
| 521 | Id EmitBindlessImageAtomicXor32(EmitContext&); | ||
| 522 | Id EmitBindlessImageAtomicExchange32(EmitContext&); | ||
| 523 | Id EmitBoundImageAtomicIAdd32(EmitContext&); | ||
| 524 | Id EmitBoundImageAtomicSMin32(EmitContext&); | ||
| 525 | Id EmitBoundImageAtomicUMin32(EmitContext&); | ||
| 526 | Id EmitBoundImageAtomicSMax32(EmitContext&); | ||
| 527 | Id EmitBoundImageAtomicUMax32(EmitContext&); | ||
| 528 | Id EmitBoundImageAtomicInc32(EmitContext&); | ||
| 529 | Id EmitBoundImageAtomicDec32(EmitContext&); | ||
| 530 | Id EmitBoundImageAtomicAnd32(EmitContext&); | ||
| 531 | Id EmitBoundImageAtomicOr32(EmitContext&); | ||
| 532 | Id EmitBoundImageAtomicXor32(EmitContext&); | ||
| 533 | Id EmitBoundImageAtomicExchange32(EmitContext&); | ||
| 534 | Id EmitImageAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 535 | Id value); | ||
| 536 | Id EmitImageAtomicSMin32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 537 | Id value); | ||
| 538 | Id EmitImageAtomicUMin32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 539 | Id value); | ||
| 540 | Id EmitImageAtomicSMax32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 541 | Id value); | ||
| 542 | Id EmitImageAtomicUMax32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 543 | Id value); | ||
| 544 | Id EmitImageAtomicInc32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 545 | Id value); | ||
| 546 | Id EmitImageAtomicDec32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 547 | Id value); | ||
| 548 | Id EmitImageAtomicAnd32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 549 | Id value); | ||
| 550 | Id EmitImageAtomicOr32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 551 | Id value); | ||
| 552 | Id EmitImageAtomicXor32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 553 | Id value); | ||
| 554 | Id EmitImageAtomicExchange32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 555 | Id value); | ||
| 556 | Id EmitLaneId(EmitContext& ctx); | ||
| 557 | Id EmitVoteAll(EmitContext& ctx, Id pred); | ||
| 558 | Id EmitVoteAny(EmitContext& ctx, Id pred); | ||
| 559 | Id EmitVoteEqual(EmitContext& ctx, Id pred); | ||
| 560 | Id EmitSubgroupBallot(EmitContext& ctx, Id pred); | ||
| 561 | Id EmitSubgroupEqMask(EmitContext& ctx); | ||
| 562 | Id EmitSubgroupLtMask(EmitContext& ctx); | ||
| 563 | Id EmitSubgroupLeMask(EmitContext& ctx); | ||
| 564 | Id EmitSubgroupGtMask(EmitContext& ctx); | ||
| 565 | Id EmitSubgroupGeMask(EmitContext& ctx); | ||
| 566 | Id EmitShuffleIndex(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp, | ||
| 567 | Id segmentation_mask); | ||
| 568 | Id EmitShuffleUp(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp, | ||
| 569 | Id segmentation_mask); | ||
| 570 | Id EmitShuffleDown(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp, | ||
| 571 | Id segmentation_mask); | ||
| 572 | Id EmitShuffleButterfly(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp, | ||
| 573 | Id segmentation_mask); | ||
| 574 | Id EmitFSwizzleAdd(EmitContext& ctx, Id op_a, Id op_b, Id swizzle); | ||
| 575 | |||
| 576 | Id EmitDPdxFine(EmitContext& ctx, Id op_a); | ||
| 577 | |||
| 578 | Id EmitDPdyFine(EmitContext& ctx, Id op_a); | ||
| 579 | |||
| 580 | Id EmitDPdxCoarse(EmitContext& ctx, Id op_a); | ||
| 581 | |||
| 582 | Id EmitDPdyCoarse(EmitContext& ctx, Id op_a); | ||
| 583 | 26 | ||
| 584 | } // namespace Shader::Backend::SPIRV | 27 | } // namespace Shader::Backend::SPIRV |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp index 6e17d1c7e..053800eb7 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | namespace { | 9 | namespace { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp index 705aebd81..e0b52a001 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | #include "shader_recompiler/frontend/ir/modifiers.h" | 7 | #include "shader_recompiler/frontend/ir/modifiers.h" |
| 7 | 8 | ||
| 8 | namespace Shader::Backend::SPIRV { | 9 | namespace Shader::Backend::SPIRV { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp index 93a45d834..bb11f4f4e 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | 9 | ||
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp index 079e226de..10ff4ecab 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | #include "shader_recompiler/frontend/ir/modifiers.h" | 7 | #include "shader_recompiler/frontend/ir/modifiers.h" |
| 7 | 8 | ||
| 8 | namespace Shader::Backend::SPIRV { | 9 | namespace Shader::Backend::SPIRV { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp index ef32184ea..8e57ff070 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp | |||
| @@ -6,6 +6,7 @@ | |||
| 6 | #include <utility> | 6 | #include <utility> |
| 7 | 7 | ||
| 8 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 8 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 9 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 9 | 10 | ||
| 10 | namespace Shader::Backend::SPIRV { | 11 | namespace Shader::Backend::SPIRV { |
| 11 | namespace { | 12 | namespace { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp index b4a6fbb93..6154c46be 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | 9 | ||
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp index acb8957fe..fd74e475f 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_convert.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | namespace { | 9 | namespace { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp index b3afbef25..61cf25f9c 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | #include "shader_recompiler/frontend/ir/modifiers.h" | 7 | #include "shader_recompiler/frontend/ir/modifiers.h" |
| 7 | 8 | ||
| 8 | namespace Shader::Backend::SPIRV { | 9 | namespace Shader::Backend::SPIRV { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp index 6680cf1b3..5832104df 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | |||
| @@ -5,6 +5,7 @@ | |||
| 5 | #include <boost/container/static_vector.hpp> | 5 | #include <boost/container/static_vector.hpp> |
| 6 | 6 | ||
| 7 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 7 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 8 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 8 | #include "shader_recompiler/frontend/ir/modifiers.h" | 9 | #include "shader_recompiler/frontend/ir/modifiers.h" |
| 9 | 10 | ||
| 10 | namespace Shader::Backend::SPIRV { | 11 | namespace Shader::Backend::SPIRV { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image_atomic.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image_atomic.cpp index 05bed22b9..d7f1a365a 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_image_atomic.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_image_atomic.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | #include "shader_recompiler/frontend/ir/modifiers.h" | 7 | #include "shader_recompiler/frontend/ir/modifiers.h" |
| 7 | 8 | ||
| 8 | namespace Shader::Backend::SPIRV { | 9 | namespace Shader::Backend::SPIRV { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h new file mode 100644 index 000000000..b5eec3cd1 --- /dev/null +++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h | |||
| @@ -0,0 +1,583 @@ | |||
| 1 | // Copyright 2021 yuzu Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #include <sirit/sirit.h> | ||
| 6 | |||
| 7 | #include "common/common_types.h" | ||
| 8 | |||
| 9 | namespace IR { | ||
| 10 | enum class Attribute : u64; | ||
| 11 | enum class Patch : u64; | ||
| 12 | class Inst; | ||
| 13 | class Value; | ||
| 14 | } // namespace IR | ||
| 15 | |||
| 16 | namespace Shader::Backend::SPIRV { | ||
| 17 | |||
| 18 | using Sirit::Id; | ||
| 19 | |||
| 20 | class EmitContext; | ||
| 21 | |||
| 22 | // Microinstruction emitters | ||
| 23 | Id EmitPhi(EmitContext& ctx, IR::Inst* inst); | ||
| 24 | void EmitVoid(EmitContext& ctx); | ||
| 25 | Id EmitIdentity(EmitContext& ctx, const IR::Value& value); | ||
| 26 | void EmitBranch(EmitContext& ctx, Id label); | ||
| 27 | void EmitBranchConditional(EmitContext& ctx, Id condition, Id true_label, Id false_label); | ||
| 28 | void EmitLoopMerge(EmitContext& ctx, Id merge_label, Id continue_label); | ||
| 29 | void EmitSelectionMerge(EmitContext& ctx, Id merge_label); | ||
| 30 | void EmitReturn(EmitContext& ctx); | ||
| 31 | void EmitJoin(EmitContext& ctx); | ||
| 32 | void EmitUnreachable(EmitContext& ctx); | ||
| 33 | void EmitDemoteToHelperInvocation(EmitContext& ctx, Id continue_label); | ||
| 34 | void EmitBarrier(EmitContext& ctx); | ||
| 35 | void EmitWorkgroupMemoryBarrier(EmitContext& ctx); | ||
| 36 | void EmitDeviceMemoryBarrier(EmitContext& ctx); | ||
| 37 | void EmitPrologue(EmitContext& ctx); | ||
| 38 | void EmitEpilogue(EmitContext& ctx); | ||
| 39 | void EmitEmitVertex(EmitContext& ctx, const IR::Value& stream); | ||
| 40 | void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream); | ||
| 41 | void EmitGetRegister(EmitContext& ctx); | ||
| 42 | void EmitSetRegister(EmitContext& ctx); | ||
| 43 | void EmitGetPred(EmitContext& ctx); | ||
| 44 | void EmitSetPred(EmitContext& ctx); | ||
| 45 | void EmitSetGotoVariable(EmitContext& ctx); | ||
| 46 | void EmitGetGotoVariable(EmitContext& ctx); | ||
| 47 | void EmitSetIndirectBranchVariable(EmitContext& ctx); | ||
| 48 | void EmitGetIndirectBranchVariable(EmitContext& ctx); | ||
| 49 | Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 50 | Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 51 | Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 52 | Id EmitGetCbufS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 53 | Id EmitGetCbufU32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 54 | Id EmitGetCbufF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 55 | Id EmitGetCbufU32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 56 | Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, Id vertex); | ||
| 57 | void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, Id value, Id vertex); | ||
| 58 | Id EmitGetAttributeIndexed(EmitContext& ctx, Id offset, Id vertex); | ||
| 59 | void EmitSetAttributeIndexed(EmitContext& ctx, Id offset, Id value, Id vertex); | ||
| 60 | Id EmitGetPatch(EmitContext& ctx, IR::Patch patch); | ||
| 61 | void EmitSetPatch(EmitContext& ctx, IR::Patch patch, Id value); | ||
| 62 | void EmitSetFragColor(EmitContext& ctx, u32 index, u32 component, Id value); | ||
| 63 | void EmitSetSampleMask(EmitContext& ctx, Id value); | ||
| 64 | void EmitSetFragDepth(EmitContext& ctx, Id value); | ||
| 65 | void EmitGetZFlag(EmitContext& ctx); | ||
| 66 | void EmitGetSFlag(EmitContext& ctx); | ||
| 67 | void EmitGetCFlag(EmitContext& ctx); | ||
| 68 | void EmitGetOFlag(EmitContext& ctx); | ||
| 69 | void EmitSetZFlag(EmitContext& ctx); | ||
| 70 | void EmitSetSFlag(EmitContext& ctx); | ||
| 71 | void EmitSetCFlag(EmitContext& ctx); | ||
| 72 | void EmitSetOFlag(EmitContext& ctx); | ||
| 73 | Id EmitWorkgroupId(EmitContext& ctx); | ||
| 74 | Id EmitLocalInvocationId(EmitContext& ctx); | ||
| 75 | Id EmitInvocationId(EmitContext& ctx); | ||
| 76 | Id EmitSampleId(EmitContext& ctx); | ||
| 77 | Id EmitIsHelperInvocation(EmitContext& ctx); | ||
| 78 | Id EmitYDirection(EmitContext& ctx); | ||
| 79 | Id EmitLoadLocal(EmitContext& ctx, Id word_offset); | ||
| 80 | void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value); | ||
| 81 | Id EmitUndefU1(EmitContext& ctx); | ||
| 82 | Id EmitUndefU8(EmitContext& ctx); | ||
| 83 | Id EmitUndefU16(EmitContext& ctx); | ||
| 84 | Id EmitUndefU32(EmitContext& ctx); | ||
| 85 | Id EmitUndefU64(EmitContext& ctx); | ||
| 86 | void EmitLoadGlobalU8(EmitContext& ctx); | ||
| 87 | void EmitLoadGlobalS8(EmitContext& ctx); | ||
| 88 | void EmitLoadGlobalU16(EmitContext& ctx); | ||
| 89 | void EmitLoadGlobalS16(EmitContext& ctx); | ||
| 90 | Id EmitLoadGlobal32(EmitContext& ctx, Id address); | ||
| 91 | Id EmitLoadGlobal64(EmitContext& ctx, Id address); | ||
| 92 | Id EmitLoadGlobal128(EmitContext& ctx, Id address); | ||
| 93 | void EmitWriteGlobalU8(EmitContext& ctx); | ||
| 94 | void EmitWriteGlobalS8(EmitContext& ctx); | ||
| 95 | void EmitWriteGlobalU16(EmitContext& ctx); | ||
| 96 | void EmitWriteGlobalS16(EmitContext& ctx); | ||
| 97 | void EmitWriteGlobal32(EmitContext& ctx, Id address, Id value); | ||
| 98 | void EmitWriteGlobal64(EmitContext& ctx, Id address, Id value); | ||
| 99 | void EmitWriteGlobal128(EmitContext& ctx, Id address, Id value); | ||
| 100 | Id EmitLoadStorageU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 101 | Id EmitLoadStorageS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 102 | Id EmitLoadStorageU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 103 | Id EmitLoadStorageS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 104 | Id EmitLoadStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 105 | Id EmitLoadStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 106 | Id EmitLoadStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | ||
| 107 | void EmitWriteStorageU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 108 | Id value); | ||
| 109 | void EmitWriteStorageS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 110 | Id value); | ||
| 111 | void EmitWriteStorageU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 112 | Id value); | ||
| 113 | void EmitWriteStorageS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 114 | Id value); | ||
| 115 | void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 116 | Id value); | ||
| 117 | void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 118 | Id value); | ||
| 119 | void EmitWriteStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 120 | Id value); | ||
| 121 | Id EmitLoadSharedU8(EmitContext& ctx, Id offset); | ||
| 122 | Id EmitLoadSharedS8(EmitContext& ctx, Id offset); | ||
| 123 | Id EmitLoadSharedU16(EmitContext& ctx, Id offset); | ||
| 124 | Id EmitLoadSharedS16(EmitContext& ctx, Id offset); | ||
| 125 | Id EmitLoadSharedU32(EmitContext& ctx, Id offset); | ||
| 126 | Id EmitLoadSharedU64(EmitContext& ctx, Id offset); | ||
| 127 | Id EmitLoadSharedU128(EmitContext& ctx, Id offset); | ||
| 128 | void EmitWriteSharedU8(EmitContext& ctx, Id offset, Id value); | ||
| 129 | void EmitWriteSharedU16(EmitContext& ctx, Id offset, Id value); | ||
| 130 | void EmitWriteSharedU32(EmitContext& ctx, Id offset, Id value); | ||
| 131 | void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value); | ||
| 132 | void EmitWriteSharedU128(EmitContext& ctx, Id offset, Id value); | ||
| 133 | Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2); | ||
| 134 | Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3); | ||
| 135 | Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4); | ||
| 136 | Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index); | ||
| 137 | Id EmitCompositeExtractU32x3(EmitContext& ctx, Id composite, u32 index); | ||
| 138 | Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index); | ||
| 139 | Id EmitCompositeInsertU32x2(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 140 | Id EmitCompositeInsertU32x3(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 141 | Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 142 | Id EmitCompositeConstructF16x2(EmitContext& ctx, Id e1, Id e2); | ||
| 143 | Id EmitCompositeConstructF16x3(EmitContext& ctx, Id e1, Id e2, Id e3); | ||
| 144 | Id EmitCompositeConstructF16x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4); | ||
| 145 | Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index); | ||
| 146 | Id EmitCompositeExtractF16x3(EmitContext& ctx, Id composite, u32 index); | ||
| 147 | Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index); | ||
| 148 | Id EmitCompositeInsertF16x2(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 149 | Id EmitCompositeInsertF16x3(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 150 | Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 151 | Id EmitCompositeConstructF32x2(EmitContext& ctx, Id e1, Id e2); | ||
| 152 | Id EmitCompositeConstructF32x3(EmitContext& ctx, Id e1, Id e2, Id e3); | ||
| 153 | Id EmitCompositeConstructF32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4); | ||
| 154 | Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index); | ||
| 155 | Id EmitCompositeExtractF32x3(EmitContext& ctx, Id composite, u32 index); | ||
| 156 | Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index); | ||
| 157 | Id EmitCompositeInsertF32x2(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 158 | Id EmitCompositeInsertF32x3(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 159 | Id EmitCompositeInsertF32x4(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 160 | void EmitCompositeConstructF64x2(EmitContext& ctx); | ||
| 161 | void EmitCompositeConstructF64x3(EmitContext& ctx); | ||
| 162 | void EmitCompositeConstructF64x4(EmitContext& ctx); | ||
| 163 | void EmitCompositeExtractF64x2(EmitContext& ctx); | ||
| 164 | void EmitCompositeExtractF64x3(EmitContext& ctx); | ||
| 165 | void EmitCompositeExtractF64x4(EmitContext& ctx); | ||
| 166 | Id EmitCompositeInsertF64x2(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 167 | Id EmitCompositeInsertF64x3(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 168 | Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index); | ||
| 169 | Id EmitSelectU1(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 170 | Id EmitSelectU8(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 171 | Id EmitSelectU16(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 172 | Id EmitSelectU32(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 173 | Id EmitSelectU64(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 174 | Id EmitSelectF16(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 175 | Id EmitSelectF32(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 176 | Id EmitSelectF64(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 177 | void EmitBitCastU16F16(EmitContext& ctx); | ||
| 178 | Id EmitBitCastU32F32(EmitContext& ctx, Id value); | ||
| 179 | void EmitBitCastU64F64(EmitContext& ctx); | ||
| 180 | void EmitBitCastF16U16(EmitContext& ctx); | ||
| 181 | Id EmitBitCastF32U32(EmitContext& ctx, Id value); | ||
| 182 | void EmitBitCastF64U64(EmitContext& ctx); | ||
| 183 | Id EmitPackUint2x32(EmitContext& ctx, Id value); | ||
| 184 | Id EmitUnpackUint2x32(EmitContext& ctx, Id value); | ||
| 185 | Id EmitPackFloat2x16(EmitContext& ctx, Id value); | ||
| 186 | Id EmitUnpackFloat2x16(EmitContext& ctx, Id value); | ||
| 187 | Id EmitPackHalf2x16(EmitContext& ctx, Id value); | ||
| 188 | Id EmitUnpackHalf2x16(EmitContext& ctx, Id value); | ||
| 189 | Id EmitPackDouble2x32(EmitContext& ctx, Id value); | ||
| 190 | Id EmitUnpackDouble2x32(EmitContext& ctx, Id value); | ||
| 191 | void EmitGetZeroFromOp(EmitContext& ctx); | ||
| 192 | void EmitGetSignFromOp(EmitContext& ctx); | ||
| 193 | void EmitGetCarryFromOp(EmitContext& ctx); | ||
| 194 | void EmitGetOverflowFromOp(EmitContext& ctx); | ||
| 195 | void EmitGetSparseFromOp(EmitContext& ctx); | ||
| 196 | void EmitGetInBoundsFromOp(EmitContext& ctx); | ||
| 197 | Id EmitFPAbs16(EmitContext& ctx, Id value); | ||
| 198 | Id EmitFPAbs32(EmitContext& ctx, Id value); | ||
| 199 | Id EmitFPAbs64(EmitContext& ctx, Id value); | ||
| 200 | Id EmitFPAdd16(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 201 | Id EmitFPAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 202 | Id EmitFPAdd64(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 203 | Id EmitFPFma16(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c); | ||
| 204 | Id EmitFPFma32(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c); | ||
| 205 | Id EmitFPFma64(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c); | ||
| 206 | Id EmitFPMax32(EmitContext& ctx, Id a, Id b); | ||
| 207 | Id EmitFPMax64(EmitContext& ctx, Id a, Id b); | ||
| 208 | Id EmitFPMin32(EmitContext& ctx, Id a, Id b); | ||
| 209 | Id EmitFPMin64(EmitContext& ctx, Id a, Id b); | ||
| 210 | Id EmitFPMul16(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 211 | Id EmitFPMul32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 212 | Id EmitFPMul64(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 213 | Id EmitFPNeg16(EmitContext& ctx, Id value); | ||
| 214 | Id EmitFPNeg32(EmitContext& ctx, Id value); | ||
| 215 | Id EmitFPNeg64(EmitContext& ctx, Id value); | ||
| 216 | Id EmitFPSin(EmitContext& ctx, Id value); | ||
| 217 | Id EmitFPCos(EmitContext& ctx, Id value); | ||
| 218 | Id EmitFPExp2(EmitContext& ctx, Id value); | ||
| 219 | Id EmitFPLog2(EmitContext& ctx, Id value); | ||
| 220 | Id EmitFPRecip32(EmitContext& ctx, Id value); | ||
| 221 | Id EmitFPRecip64(EmitContext& ctx, Id value); | ||
| 222 | Id EmitFPRecipSqrt32(EmitContext& ctx, Id value); | ||
| 223 | Id EmitFPRecipSqrt64(EmitContext& ctx, Id value); | ||
| 224 | Id EmitFPSqrt(EmitContext& ctx, Id value); | ||
| 225 | Id EmitFPSaturate16(EmitContext& ctx, Id value); | ||
| 226 | Id EmitFPSaturate32(EmitContext& ctx, Id value); | ||
| 227 | Id EmitFPSaturate64(EmitContext& ctx, Id value); | ||
| 228 | Id EmitFPClamp16(EmitContext& ctx, Id value, Id min_value, Id max_value); | ||
| 229 | Id EmitFPClamp32(EmitContext& ctx, Id value, Id min_value, Id max_value); | ||
| 230 | Id EmitFPClamp64(EmitContext& ctx, Id value, Id min_value, Id max_value); | ||
| 231 | Id EmitFPRoundEven16(EmitContext& ctx, Id value); | ||
| 232 | Id EmitFPRoundEven32(EmitContext& ctx, Id value); | ||
| 233 | Id EmitFPRoundEven64(EmitContext& ctx, Id value); | ||
| 234 | Id EmitFPFloor16(EmitContext& ctx, Id value); | ||
| 235 | Id EmitFPFloor32(EmitContext& ctx, Id value); | ||
| 236 | Id EmitFPFloor64(EmitContext& ctx, Id value); | ||
| 237 | Id EmitFPCeil16(EmitContext& ctx, Id value); | ||
| 238 | Id EmitFPCeil32(EmitContext& ctx, Id value); | ||
| 239 | Id EmitFPCeil64(EmitContext& ctx, Id value); | ||
| 240 | Id EmitFPTrunc16(EmitContext& ctx, Id value); | ||
| 241 | Id EmitFPTrunc32(EmitContext& ctx, Id value); | ||
| 242 | Id EmitFPTrunc64(EmitContext& ctx, Id value); | ||
| 243 | Id EmitFPOrdEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 244 | Id EmitFPOrdEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 245 | Id EmitFPOrdEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 246 | Id EmitFPUnordEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 247 | Id EmitFPUnordEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 248 | Id EmitFPUnordEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 249 | Id EmitFPOrdNotEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 250 | Id EmitFPOrdNotEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 251 | Id EmitFPOrdNotEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 252 | Id EmitFPUnordNotEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 253 | Id EmitFPUnordNotEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 254 | Id EmitFPUnordNotEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 255 | Id EmitFPOrdLessThan16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 256 | Id EmitFPOrdLessThan32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 257 | Id EmitFPOrdLessThan64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 258 | Id EmitFPUnordLessThan16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 259 | Id EmitFPUnordLessThan32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 260 | Id EmitFPUnordLessThan64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 261 | Id EmitFPOrdGreaterThan16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 262 | Id EmitFPOrdGreaterThan32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 263 | Id EmitFPOrdGreaterThan64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 264 | Id EmitFPUnordGreaterThan16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 265 | Id EmitFPUnordGreaterThan32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 266 | Id EmitFPUnordGreaterThan64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 267 | Id EmitFPOrdLessThanEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 268 | Id EmitFPOrdLessThanEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 269 | Id EmitFPOrdLessThanEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 270 | Id EmitFPUnordLessThanEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 271 | Id EmitFPUnordLessThanEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 272 | Id EmitFPUnordLessThanEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 273 | Id EmitFPOrdGreaterThanEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 274 | Id EmitFPOrdGreaterThanEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 275 | Id EmitFPOrdGreaterThanEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 276 | Id EmitFPUnordGreaterThanEqual16(EmitContext& ctx, Id lhs, Id rhs); | ||
| 277 | Id EmitFPUnordGreaterThanEqual32(EmitContext& ctx, Id lhs, Id rhs); | ||
| 278 | Id EmitFPUnordGreaterThanEqual64(EmitContext& ctx, Id lhs, Id rhs); | ||
| 279 | Id EmitFPIsNan16(EmitContext& ctx, Id value); | ||
| 280 | Id EmitFPIsNan32(EmitContext& ctx, Id value); | ||
| 281 | Id EmitFPIsNan64(EmitContext& ctx, Id value); | ||
| 282 | Id EmitIAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 283 | Id EmitIAdd64(EmitContext& ctx, Id a, Id b); | ||
| 284 | Id EmitISub32(EmitContext& ctx, Id a, Id b); | ||
| 285 | Id EmitISub64(EmitContext& ctx, Id a, Id b); | ||
| 286 | Id EmitIMul32(EmitContext& ctx, Id a, Id b); | ||
| 287 | Id EmitINeg32(EmitContext& ctx, Id value); | ||
| 288 | Id EmitINeg64(EmitContext& ctx, Id value); | ||
| 289 | Id EmitIAbs32(EmitContext& ctx, Id value); | ||
| 290 | Id EmitIAbs64(EmitContext& ctx, Id value); | ||
| 291 | Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift); | ||
| 292 | Id EmitShiftLeftLogical64(EmitContext& ctx, Id base, Id shift); | ||
| 293 | Id EmitShiftRightLogical32(EmitContext& ctx, Id base, Id shift); | ||
| 294 | Id EmitShiftRightLogical64(EmitContext& ctx, Id base, Id shift); | ||
| 295 | Id EmitShiftRightArithmetic32(EmitContext& ctx, Id base, Id shift); | ||
| 296 | Id EmitShiftRightArithmetic64(EmitContext& ctx, Id base, Id shift); | ||
| 297 | Id EmitBitwiseAnd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 298 | Id EmitBitwiseOr32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 299 | Id EmitBitwiseXor32(EmitContext& ctx, IR::Inst* inst, Id a, Id b); | ||
| 300 | Id EmitBitFieldInsert(EmitContext& ctx, Id base, Id insert, Id offset, Id count); | ||
| 301 | Id EmitBitFieldSExtract(EmitContext& ctx, IR::Inst* inst, Id base, Id offset, Id count); | ||
| 302 | Id EmitBitFieldUExtract(EmitContext& ctx, IR::Inst* inst, Id base, Id offset, Id count); | ||
| 303 | Id EmitBitReverse32(EmitContext& ctx, Id value); | ||
| 304 | Id EmitBitCount32(EmitContext& ctx, Id value); | ||
| 305 | Id EmitBitwiseNot32(EmitContext& ctx, Id value); | ||
| 306 | Id EmitFindSMsb32(EmitContext& ctx, Id value); | ||
| 307 | Id EmitFindUMsb32(EmitContext& ctx, Id value); | ||
| 308 | Id EmitSMin32(EmitContext& ctx, Id a, Id b); | ||
| 309 | Id EmitUMin32(EmitContext& ctx, Id a, Id b); | ||
| 310 | Id EmitSMax32(EmitContext& ctx, Id a, Id b); | ||
| 311 | Id EmitUMax32(EmitContext& ctx, Id a, Id b); | ||
| 312 | Id EmitSClamp32(EmitContext& ctx, IR::Inst* inst, Id value, Id min, Id max); | ||
| 313 | Id EmitUClamp32(EmitContext& ctx, IR::Inst* inst, Id value, Id min, Id max); | ||
| 314 | Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs); | ||
| 315 | Id EmitULessThan(EmitContext& ctx, Id lhs, Id rhs); | ||
| 316 | Id EmitIEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 317 | Id EmitSLessThanEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 318 | Id EmitULessThanEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 319 | Id EmitSGreaterThan(EmitContext& ctx, Id lhs, Id rhs); | ||
| 320 | Id EmitUGreaterThan(EmitContext& ctx, Id lhs, Id rhs); | ||
| 321 | Id EmitINotEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 322 | Id EmitSGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 323 | Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); | ||
| 324 | Id EmitSharedAtomicIAdd32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 325 | Id EmitSharedAtomicSMin32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 326 | Id EmitSharedAtomicUMin32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 327 | Id EmitSharedAtomicSMax32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 328 | Id EmitSharedAtomicUMax32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 329 | Id EmitSharedAtomicInc32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 330 | Id EmitSharedAtomicDec32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 331 | Id EmitSharedAtomicAnd32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 332 | Id EmitSharedAtomicOr32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 333 | Id EmitSharedAtomicXor32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 334 | Id EmitSharedAtomicExchange32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 335 | Id EmitSharedAtomicExchange64(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 336 | Id EmitStorageAtomicIAdd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 337 | Id value); | ||
| 338 | Id EmitStorageAtomicSMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 339 | Id value); | ||
| 340 | Id EmitStorageAtomicUMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 341 | Id value); | ||
| 342 | Id EmitStorageAtomicSMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 343 | Id value); | ||
| 344 | Id EmitStorageAtomicUMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 345 | Id value); | ||
| 346 | Id EmitStorageAtomicInc32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 347 | Id value); | ||
| 348 | Id EmitStorageAtomicDec32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 349 | Id value); | ||
| 350 | Id EmitStorageAtomicAnd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 351 | Id value); | ||
| 352 | Id EmitStorageAtomicOr32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 353 | Id value); | ||
| 354 | Id EmitStorageAtomicXor32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 355 | Id value); | ||
| 356 | Id EmitStorageAtomicExchange32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 357 | Id value); | ||
| 358 | Id EmitStorageAtomicIAdd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 359 | Id value); | ||
| 360 | Id EmitStorageAtomicSMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 361 | Id value); | ||
| 362 | Id EmitStorageAtomicUMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 363 | Id value); | ||
| 364 | Id EmitStorageAtomicSMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 365 | Id value); | ||
| 366 | Id EmitStorageAtomicUMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 367 | Id value); | ||
| 368 | Id EmitStorageAtomicAnd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 369 | Id value); | ||
| 370 | Id EmitStorageAtomicOr64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 371 | Id value); | ||
| 372 | Id EmitStorageAtomicXor64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 373 | Id value); | ||
| 374 | Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 375 | Id value); | ||
| 376 | Id EmitStorageAtomicAddF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 377 | Id value); | ||
| 378 | Id EmitStorageAtomicAddF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 379 | Id value); | ||
| 380 | Id EmitStorageAtomicAddF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 381 | Id value); | ||
| 382 | Id EmitStorageAtomicMinF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 383 | Id value); | ||
| 384 | Id EmitStorageAtomicMinF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 385 | Id value); | ||
| 386 | Id EmitStorageAtomicMaxF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 387 | Id value); | ||
| 388 | Id EmitStorageAtomicMaxF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 389 | Id value); | ||
| 390 | Id EmitGlobalAtomicIAdd32(EmitContext& ctx); | ||
| 391 | Id EmitGlobalAtomicSMin32(EmitContext& ctx); | ||
| 392 | Id EmitGlobalAtomicUMin32(EmitContext& ctx); | ||
| 393 | Id EmitGlobalAtomicSMax32(EmitContext& ctx); | ||
| 394 | Id EmitGlobalAtomicUMax32(EmitContext& ctx); | ||
| 395 | Id EmitGlobalAtomicInc32(EmitContext& ctx); | ||
| 396 | Id EmitGlobalAtomicDec32(EmitContext& ctx); | ||
| 397 | Id EmitGlobalAtomicAnd32(EmitContext& ctx); | ||
| 398 | Id EmitGlobalAtomicOr32(EmitContext& ctx); | ||
| 399 | Id EmitGlobalAtomicXor32(EmitContext& ctx); | ||
| 400 | Id EmitGlobalAtomicExchange32(EmitContext& ctx); | ||
| 401 | Id EmitGlobalAtomicIAdd64(EmitContext& ctx); | ||
| 402 | Id EmitGlobalAtomicSMin64(EmitContext& ctx); | ||
| 403 | Id EmitGlobalAtomicUMin64(EmitContext& ctx); | ||
| 404 | Id EmitGlobalAtomicSMax64(EmitContext& ctx); | ||
| 405 | Id EmitGlobalAtomicUMax64(EmitContext& ctx); | ||
| 406 | Id EmitGlobalAtomicInc64(EmitContext& ctx); | ||
| 407 | Id EmitGlobalAtomicDec64(EmitContext& ctx); | ||
| 408 | Id EmitGlobalAtomicAnd64(EmitContext& ctx); | ||
| 409 | Id EmitGlobalAtomicOr64(EmitContext& ctx); | ||
| 410 | Id EmitGlobalAtomicXor64(EmitContext& ctx); | ||
| 411 | Id EmitGlobalAtomicExchange64(EmitContext& ctx); | ||
| 412 | Id EmitGlobalAtomicAddF32(EmitContext& ctx); | ||
| 413 | Id EmitGlobalAtomicAddF16x2(EmitContext& ctx); | ||
| 414 | Id EmitGlobalAtomicAddF32x2(EmitContext& ctx); | ||
| 415 | Id EmitGlobalAtomicMinF16x2(EmitContext& ctx); | ||
| 416 | Id EmitGlobalAtomicMinF32x2(EmitContext& ctx); | ||
| 417 | Id EmitGlobalAtomicMaxF16x2(EmitContext& ctx); | ||
| 418 | Id EmitGlobalAtomicMaxF32x2(EmitContext& ctx); | ||
| 419 | Id EmitLogicalOr(EmitContext& ctx, Id a, Id b); | ||
| 420 | Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b); | ||
| 421 | Id EmitLogicalXor(EmitContext& ctx, Id a, Id b); | ||
| 422 | Id EmitLogicalNot(EmitContext& ctx, Id value); | ||
| 423 | Id EmitConvertS16F16(EmitContext& ctx, Id value); | ||
| 424 | Id EmitConvertS16F32(EmitContext& ctx, Id value); | ||
| 425 | Id EmitConvertS16F64(EmitContext& ctx, Id value); | ||
| 426 | Id EmitConvertS32F16(EmitContext& ctx, Id value); | ||
| 427 | Id EmitConvertS32F32(EmitContext& ctx, Id value); | ||
| 428 | Id EmitConvertS32F64(EmitContext& ctx, Id value); | ||
| 429 | Id EmitConvertS64F16(EmitContext& ctx, Id value); | ||
| 430 | Id EmitConvertS64F32(EmitContext& ctx, Id value); | ||
| 431 | Id EmitConvertS64F64(EmitContext& ctx, Id value); | ||
| 432 | Id EmitConvertU16F16(EmitContext& ctx, Id value); | ||
| 433 | Id EmitConvertU16F32(EmitContext& ctx, Id value); | ||
| 434 | Id EmitConvertU16F64(EmitContext& ctx, Id value); | ||
| 435 | Id EmitConvertU32F16(EmitContext& ctx, Id value); | ||
| 436 | Id EmitConvertU32F32(EmitContext& ctx, Id value); | ||
| 437 | Id EmitConvertU32F64(EmitContext& ctx, Id value); | ||
| 438 | Id EmitConvertU64F16(EmitContext& ctx, Id value); | ||
| 439 | Id EmitConvertU64F32(EmitContext& ctx, Id value); | ||
| 440 | Id EmitConvertU64F64(EmitContext& ctx, Id value); | ||
| 441 | Id EmitConvertU64U32(EmitContext& ctx, Id value); | ||
| 442 | Id EmitConvertU32U64(EmitContext& ctx, Id value); | ||
| 443 | Id EmitConvertF16F32(EmitContext& ctx, Id value); | ||
| 444 | Id EmitConvertF32F16(EmitContext& ctx, Id value); | ||
| 445 | Id EmitConvertF32F64(EmitContext& ctx, Id value); | ||
| 446 | Id EmitConvertF64F32(EmitContext& ctx, Id value); | ||
| 447 | Id EmitConvertF16S8(EmitContext& ctx, Id value); | ||
| 448 | Id EmitConvertF16S16(EmitContext& ctx, Id value); | ||
| 449 | Id EmitConvertF16S32(EmitContext& ctx, Id value); | ||
| 450 | Id EmitConvertF16S64(EmitContext& ctx, Id value); | ||
| 451 | Id EmitConvertF16U8(EmitContext& ctx, Id value); | ||
| 452 | Id EmitConvertF16U16(EmitContext& ctx, Id value); | ||
| 453 | Id EmitConvertF16U32(EmitContext& ctx, Id value); | ||
| 454 | Id EmitConvertF16U64(EmitContext& ctx, Id value); | ||
| 455 | Id EmitConvertF32S8(EmitContext& ctx, Id value); | ||
| 456 | Id EmitConvertF32S16(EmitContext& ctx, Id value); | ||
| 457 | Id EmitConvertF32S32(EmitContext& ctx, Id value); | ||
| 458 | Id EmitConvertF32S64(EmitContext& ctx, Id value); | ||
| 459 | Id EmitConvertF32U8(EmitContext& ctx, Id value); | ||
| 460 | Id EmitConvertF32U16(EmitContext& ctx, Id value); | ||
| 461 | Id EmitConvertF32U32(EmitContext& ctx, Id value); | ||
| 462 | Id EmitConvertF32U64(EmitContext& ctx, Id value); | ||
| 463 | Id EmitConvertF64S8(EmitContext& ctx, Id value); | ||
| 464 | Id EmitConvertF64S16(EmitContext& ctx, Id value); | ||
| 465 | Id EmitConvertF64S32(EmitContext& ctx, Id value); | ||
| 466 | Id EmitConvertF64S64(EmitContext& ctx, Id value); | ||
| 467 | Id EmitConvertF64U8(EmitContext& ctx, Id value); | ||
| 468 | Id EmitConvertF64U16(EmitContext& ctx, Id value); | ||
| 469 | Id EmitConvertF64U32(EmitContext& ctx, Id value); | ||
| 470 | Id EmitConvertF64U64(EmitContext& ctx, Id value); | ||
| 471 | Id EmitBindlessImageSampleImplicitLod(EmitContext&); | ||
| 472 | Id EmitBindlessImageSampleExplicitLod(EmitContext&); | ||
| 473 | Id EmitBindlessImageSampleDrefImplicitLod(EmitContext&); | ||
| 474 | Id EmitBindlessImageSampleDrefExplicitLod(EmitContext&); | ||
| 475 | Id EmitBindlessImageGather(EmitContext&); | ||
| 476 | Id EmitBindlessImageGatherDref(EmitContext&); | ||
| 477 | Id EmitBindlessImageFetch(EmitContext&); | ||
| 478 | Id EmitBindlessImageQueryDimensions(EmitContext&); | ||
| 479 | Id EmitBindlessImageQueryLod(EmitContext&); | ||
| 480 | Id EmitBindlessImageGradient(EmitContext&); | ||
| 481 | Id EmitBindlessImageRead(EmitContext&); | ||
| 482 | Id EmitBindlessImageWrite(EmitContext&); | ||
| 483 | Id EmitBoundImageSampleImplicitLod(EmitContext&); | ||
| 484 | Id EmitBoundImageSampleExplicitLod(EmitContext&); | ||
| 485 | Id EmitBoundImageSampleDrefImplicitLod(EmitContext&); | ||
| 486 | Id EmitBoundImageSampleDrefExplicitLod(EmitContext&); | ||
| 487 | Id EmitBoundImageGather(EmitContext&); | ||
| 488 | Id EmitBoundImageGatherDref(EmitContext&); | ||
| 489 | Id EmitBoundImageFetch(EmitContext&); | ||
| 490 | Id EmitBoundImageQueryDimensions(EmitContext&); | ||
| 491 | Id EmitBoundImageQueryLod(EmitContext&); | ||
| 492 | Id EmitBoundImageGradient(EmitContext&); | ||
| 493 | Id EmitBoundImageRead(EmitContext&); | ||
| 494 | Id EmitBoundImageWrite(EmitContext&); | ||
| 495 | Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 496 | Id bias_lc, const IR::Value& offset); | ||
| 497 | Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 498 | Id lod_lc, const IR::Value& offset); | ||
| 499 | Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, | ||
| 500 | Id coords, Id dref, Id bias_lc, const IR::Value& offset); | ||
| 501 | Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, | ||
| 502 | Id coords, Id dref, Id lod_lc, const IR::Value& offset); | ||
| 503 | Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 504 | const IR::Value& offset, const IR::Value& offset2); | ||
| 505 | Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 506 | const IR::Value& offset, const IR::Value& offset2, Id dref); | ||
| 507 | Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset, | ||
| 508 | Id lod, Id ms); | ||
| 509 | Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id lod); | ||
| 510 | Id EmitImageQueryLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords); | ||
| 511 | Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 512 | Id derivates, Id offset, Id lod_clamp); | ||
| 513 | Id EmitImageRead(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords); | ||
| 514 | void EmitImageWrite(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id color); | ||
| 515 | Id EmitBindlessImageAtomicIAdd32(EmitContext&); | ||
| 516 | Id EmitBindlessImageAtomicSMin32(EmitContext&); | ||
| 517 | Id EmitBindlessImageAtomicUMin32(EmitContext&); | ||
| 518 | Id EmitBindlessImageAtomicSMax32(EmitContext&); | ||
| 519 | Id EmitBindlessImageAtomicUMax32(EmitContext&); | ||
| 520 | Id EmitBindlessImageAtomicInc32(EmitContext&); | ||
| 521 | Id EmitBindlessImageAtomicDec32(EmitContext&); | ||
| 522 | Id EmitBindlessImageAtomicAnd32(EmitContext&); | ||
| 523 | Id EmitBindlessImageAtomicOr32(EmitContext&); | ||
| 524 | Id EmitBindlessImageAtomicXor32(EmitContext&); | ||
| 525 | Id EmitBindlessImageAtomicExchange32(EmitContext&); | ||
| 526 | Id EmitBoundImageAtomicIAdd32(EmitContext&); | ||
| 527 | Id EmitBoundImageAtomicSMin32(EmitContext&); | ||
| 528 | Id EmitBoundImageAtomicUMin32(EmitContext&); | ||
| 529 | Id EmitBoundImageAtomicSMax32(EmitContext&); | ||
| 530 | Id EmitBoundImageAtomicUMax32(EmitContext&); | ||
| 531 | Id EmitBoundImageAtomicInc32(EmitContext&); | ||
| 532 | Id EmitBoundImageAtomicDec32(EmitContext&); | ||
| 533 | Id EmitBoundImageAtomicAnd32(EmitContext&); | ||
| 534 | Id EmitBoundImageAtomicOr32(EmitContext&); | ||
| 535 | Id EmitBoundImageAtomicXor32(EmitContext&); | ||
| 536 | Id EmitBoundImageAtomicExchange32(EmitContext&); | ||
| 537 | Id EmitImageAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 538 | Id value); | ||
| 539 | Id EmitImageAtomicSMin32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 540 | Id value); | ||
| 541 | Id EmitImageAtomicUMin32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 542 | Id value); | ||
| 543 | Id EmitImageAtomicSMax32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 544 | Id value); | ||
| 545 | Id EmitImageAtomicUMax32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 546 | Id value); | ||
| 547 | Id EmitImageAtomicInc32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 548 | Id value); | ||
| 549 | Id EmitImageAtomicDec32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 550 | Id value); | ||
| 551 | Id EmitImageAtomicAnd32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 552 | Id value); | ||
| 553 | Id EmitImageAtomicOr32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 554 | Id value); | ||
| 555 | Id EmitImageAtomicXor32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 556 | Id value); | ||
| 557 | Id EmitImageAtomicExchange32(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 558 | Id value); | ||
| 559 | Id EmitLaneId(EmitContext& ctx); | ||
| 560 | Id EmitVoteAll(EmitContext& ctx, Id pred); | ||
| 561 | Id EmitVoteAny(EmitContext& ctx, Id pred); | ||
| 562 | Id EmitVoteEqual(EmitContext& ctx, Id pred); | ||
| 563 | Id EmitSubgroupBallot(EmitContext& ctx, Id pred); | ||
| 564 | Id EmitSubgroupEqMask(EmitContext& ctx); | ||
| 565 | Id EmitSubgroupLtMask(EmitContext& ctx); | ||
| 566 | Id EmitSubgroupLeMask(EmitContext& ctx); | ||
| 567 | Id EmitSubgroupGtMask(EmitContext& ctx); | ||
| 568 | Id EmitSubgroupGeMask(EmitContext& ctx); | ||
| 569 | Id EmitShuffleIndex(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp, | ||
| 570 | Id segmentation_mask); | ||
| 571 | Id EmitShuffleUp(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp, | ||
| 572 | Id segmentation_mask); | ||
| 573 | Id EmitShuffleDown(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp, | ||
| 574 | Id segmentation_mask); | ||
| 575 | Id EmitShuffleButterfly(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp, | ||
| 576 | Id segmentation_mask); | ||
| 577 | Id EmitFSwizzleAdd(EmitContext& ctx, Id op_a, Id op_b, Id swizzle); | ||
| 578 | Id EmitDPdxFine(EmitContext& ctx, Id op_a); | ||
| 579 | Id EmitDPdyFine(EmitContext& ctx, Id op_a); | ||
| 580 | Id EmitDPdxCoarse(EmitContext& ctx, Id op_a); | ||
| 581 | Id EmitDPdyCoarse(EmitContext& ctx, Id op_a); | ||
| 582 | |||
| 583 | } // namespace Shader::Backend::SPIRV | ||
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index 86e6a4f3b..06ab23b1d 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | namespace { | 9 | namespace { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp index bb434def2..b9a9500fc 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_logical.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | 9 | ||
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp index a6a3f3351..37a66095f 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp | |||
| @@ -5,6 +5,7 @@ | |||
| 5 | #include <bit> | 5 | #include <bit> |
| 6 | 6 | ||
| 7 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 7 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 8 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 8 | 9 | ||
| 9 | namespace Shader::Backend::SPIRV { | 10 | namespace Shader::Backend::SPIRV { |
| 10 | namespace { | 11 | namespace { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp index 0b45db45e..c5b4f4720 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | 9 | ||
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_shared_memory.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_shared_memory.cpp index 710d1cd25..9a79fc7a2 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_shared_memory.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_shared_memory.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | namespace { | 9 | namespace { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp index d5430e905..ba948f3c9 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_special.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | namespace { | 9 | namespace { |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp index 19b06dbe4..c9f469e90 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | 9 | ||
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp index 239e2ecab..78b1e1ba7 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" |
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 6 | 7 | ||
| 7 | namespace Shader::Backend::SPIRV { | 8 | namespace Shader::Backend::SPIRV { |
| 8 | namespace { | 9 | namespace { |