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| author | 2023-01-25 22:03:15 -0500 | |
|---|---|---|
| committer | 2023-01-25 22:03:15 -0500 | |
| commit | 93cc6e4d992d60a7e8fe73d9ab062e1187775ec5 (patch) | |
| tree | 335599cbf3f86107b0ceca197237c041c33827f0 /src/shader_recompiler/backend | |
| parent | Merge pull request #9555 from abouvier/catch2-update (diff) | |
| download | yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.tar.gz yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.tar.xz yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.zip | |
shader_recompiler: Remove S32 IR type
The frontend IR opcodes do not distinguish between signed and unsigned integer types.
Fixes broken shaders when IR validation/graphics debugging is enabled for shaders that used BitCastS32F32
Diffstat (limited to 'src/shader_recompiler/backend')
6 files changed, 0 insertions, 15 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp index 5bfdecc09..2fc2a0ac6 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp | |||
| @@ -43,10 +43,6 @@ void EmitBitCastU64F64(EmitContext&, IR::Inst& inst, const IR::Value& value) { | |||
| 43 | Alias(inst, value); | 43 | Alias(inst, value); |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | void EmitBitCastS32F32(EmitContext&, IR::Inst& inst, const IR::Value& value) { | ||
| 47 | Alias(inst, value); | ||
| 48 | } | ||
| 49 | |||
| 50 | void EmitBitCastF16U16(EmitContext&, IR::Inst& inst, const IR::Value& value) { | 46 | void EmitBitCastF16U16(EmitContext&, IR::Inst& inst, const IR::Value& value) { |
| 51 | Alias(inst, value); | 47 | Alias(inst, value); |
| 52 | } | 48 | } |
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h index eaaf9ba39..415a249e4 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h +++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |||
| @@ -197,7 +197,6 @@ void EmitSelectF64(EmitContext& ctx, ScalarS32 cond, Register true_value, Regist | |||
| 197 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 197 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 198 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 198 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 199 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 199 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 200 | void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 201 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 200 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 202 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 201 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 203 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 202 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp b/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp index 8e5e6cf1f..1be4a0f59 100644 --- a/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp | |||
| @@ -48,10 +48,6 @@ void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, std::string_view value) | |||
| 48 | ctx.AddU64("{}=doubleBitsToUint64({});", inst, value); | 48 | ctx.AddU64("{}=doubleBitsToUint64({});", inst, value); |
| 49 | } | 49 | } |
| 50 | 50 | ||
| 51 | void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value) { | ||
| 52 | ctx.AddF32("{}=ftoi({});", inst, value); | ||
| 53 | } | ||
| 54 | |||
| 55 | void EmitBitCastF16U16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst) { | 51 | void EmitBitCastF16U16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst) { |
| 56 | NotImplemented(); | 52 | NotImplemented(); |
| 57 | } | 53 | } |
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h index 4151c89de..c6df1dba7 100644 --- a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h +++ b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h | |||
| @@ -231,7 +231,6 @@ void EmitSelectF64(EmitContext& ctx, IR::Inst& inst, std::string_view cond, | |||
| 231 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst); | 231 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst); |
| 232 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 232 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 233 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 233 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 234 | void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value); | ||
| 235 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst); | 234 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst); |
| 236 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 235 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 237 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 236 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp index 50daacd95..c4ca28d11 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp | |||
| @@ -18,10 +18,6 @@ void EmitBitCastU64F64(EmitContext&) { | |||
| 18 | throw NotImplementedException("SPIR-V Instruction"); | 18 | throw NotImplementedException("SPIR-V Instruction"); |
| 19 | } | 19 | } |
| 20 | 20 | ||
| 21 | void EmitBitCastS32F32(EmitContext&) { | ||
| 22 | throw NotImplementedException("SPIR-V Instruction"); | ||
| 23 | } | ||
| 24 | |||
| 25 | void EmitBitCastF16U16(EmitContext&) { | 21 | void EmitBitCastF16U16(EmitContext&) { |
| 26 | throw NotImplementedException("SPIR-V Instruction"); | 22 | throw NotImplementedException("SPIR-V Instruction"); |
| 27 | } | 23 | } |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h index e31cdc5e8..db12e8176 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h | |||
| @@ -179,7 +179,6 @@ Id EmitSelectF64(EmitContext& ctx, Id cond, Id true_value, Id false_value); | |||
| 179 | void EmitBitCastU16F16(EmitContext& ctx); | 179 | void EmitBitCastU16F16(EmitContext& ctx); |
| 180 | Id EmitBitCastU32F32(EmitContext& ctx, Id value); | 180 | Id EmitBitCastU32F32(EmitContext& ctx, Id value); |
| 181 | void EmitBitCastU64F64(EmitContext& ctx); | 181 | void EmitBitCastU64F64(EmitContext& ctx); |
| 182 | void EmitBitCastS32F32(EmitContext& ctx); | ||
| 183 | void EmitBitCastF16U16(EmitContext&); | 182 | void EmitBitCastF16U16(EmitContext&); |
| 184 | Id EmitBitCastF32U32(EmitContext& ctx, Id value); | 183 | Id EmitBitCastF32U32(EmitContext& ctx, Id value); |
| 185 | void EmitBitCastF64U64(EmitContext& ctx); | 184 | void EmitBitCastF64U64(EmitContext& ctx); |