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| author | 2022-11-04 14:39:42 +0800 | |
|---|---|---|
| committer | 2022-11-04 02:39:42 -0400 | |
| commit | 75596c07e0fc1462c2a19484e168f4944c33d3d3 (patch) | |
| tree | 1aa919ea76f467c51b3fc591a72c57f5ade92560 /src/shader_recompiler/backend | |
| parent | UI: Add options to hide extra columns (#9093) (diff) | |
| download | yuzu-75596c07e0fc1462c2a19484e168f4944c33d3d3.tar.gz yuzu-75596c07e0fc1462c2a19484e168f4944c33d3d3.tar.xz yuzu-75596c07e0fc1462c2a19484e168f4944c33d3d3.zip | |
video_core: Fix SNORM texture buffer emulating error (#9001)
Diffstat (limited to 'src/shader_recompiler/backend')
6 files changed, 16 insertions, 1 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp index 2fc2a0ac6..5bfdecc09 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp | |||
| @@ -43,6 +43,10 @@ void EmitBitCastU64F64(EmitContext&, IR::Inst& inst, const IR::Value& value) { | |||
| 43 | Alias(inst, value); | 43 | Alias(inst, value); |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | void EmitBitCastS32F32(EmitContext&, IR::Inst& inst, const IR::Value& value) { | ||
| 47 | Alias(inst, value); | ||
| 48 | } | ||
| 49 | |||
| 46 | void EmitBitCastF16U16(EmitContext&, IR::Inst& inst, const IR::Value& value) { | 50 | void EmitBitCastF16U16(EmitContext&, IR::Inst& inst, const IR::Value& value) { |
| 47 | Alias(inst, value); | 51 | Alias(inst, value); |
| 48 | } | 52 | } |
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h index c08f48ed9..d645fd532 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h +++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |||
| @@ -196,6 +196,7 @@ void EmitSelectF64(EmitContext& ctx, ScalarS32 cond, Register true_value, Regist | |||
| 196 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 196 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 197 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 197 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 198 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 198 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 199 | void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 199 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 200 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 200 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 201 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 201 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 202 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp b/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp index 1be4a0f59..8e5e6cf1f 100644 --- a/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp | |||
| @@ -48,6 +48,10 @@ void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, std::string_view value) | |||
| 48 | ctx.AddU64("{}=doubleBitsToUint64({});", inst, value); | 48 | ctx.AddU64("{}=doubleBitsToUint64({});", inst, value); |
| 49 | } | 49 | } |
| 50 | 50 | ||
| 51 | void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value) { | ||
| 52 | ctx.AddF32("{}=ftoi({});", inst, value); | ||
| 53 | } | ||
| 54 | |||
| 51 | void EmitBitCastF16U16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst) { | 55 | void EmitBitCastF16U16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst) { |
| 52 | NotImplemented(); | 56 | NotImplemented(); |
| 53 | } | 57 | } |
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h index 3c8bcb7e9..96e683b5e 100644 --- a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h +++ b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h | |||
| @@ -230,6 +230,7 @@ void EmitSelectF64(EmitContext& ctx, IR::Inst& inst, std::string_view cond, | |||
| 230 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst); | 230 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst); |
| 231 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 231 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 232 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 232 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 233 | void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value); | ||
| 233 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst); | 234 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst); |
| 234 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 235 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
| 235 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, std::string_view value); | 236 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, std::string_view value); |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp index c4ca28d11..50daacd95 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp | |||
| @@ -18,6 +18,10 @@ void EmitBitCastU64F64(EmitContext&) { | |||
| 18 | throw NotImplementedException("SPIR-V Instruction"); | 18 | throw NotImplementedException("SPIR-V Instruction"); |
| 19 | } | 19 | } |
| 20 | 20 | ||
| 21 | void EmitBitCastS32F32(EmitContext&) { | ||
| 22 | throw NotImplementedException("SPIR-V Instruction"); | ||
| 23 | } | ||
| 24 | |||
| 21 | void EmitBitCastF16U16(EmitContext&) { | 25 | void EmitBitCastF16U16(EmitContext&) { |
| 22 | throw NotImplementedException("SPIR-V Instruction"); | 26 | throw NotImplementedException("SPIR-V Instruction"); |
| 23 | } | 27 | } |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h index 86dd3c4f3..7070c8fda 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h | |||
| @@ -178,7 +178,8 @@ Id EmitSelectF64(EmitContext& ctx, Id cond, Id true_value, Id false_value); | |||
| 178 | void EmitBitCastU16F16(EmitContext& ctx); | 178 | void EmitBitCastU16F16(EmitContext& ctx); |
| 179 | Id EmitBitCastU32F32(EmitContext& ctx, Id value); | 179 | Id EmitBitCastU32F32(EmitContext& ctx, Id value); |
| 180 | void EmitBitCastU64F64(EmitContext& ctx); | 180 | void EmitBitCastU64F64(EmitContext& ctx); |
| 181 | void EmitBitCastF16U16(EmitContext& ctx); | 181 | void EmitBitCastS32F32(EmitContext& ctx); |
| 182 | void EmitBitCastF16U16(EmitContext&); | ||
| 182 | Id EmitBitCastF32U32(EmitContext& ctx, Id value); | 183 | Id EmitBitCastF32U32(EmitContext& ctx, Id value); |
| 183 | void EmitBitCastF64U64(EmitContext& ctx); | 184 | void EmitBitCastF64U64(EmitContext& ctx); |
| 184 | Id EmitPackUint2x32(EmitContext& ctx, Id value); | 185 | Id EmitPackUint2x32(EmitContext& ctx, Id value); |