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authorGravatar ameerj2021-03-05 01:15:16 -0500
committerGravatar ameerj2021-07-22 21:51:23 -0400
commit5465cb156107a27df525dfedbfd4e920b7f71253 (patch)
tree3bc5940f90e31e09820af69cd845eef92a7d7201 /src/shader_recompiler/backend
parentshader: Deduplicate HADD2 code (diff)
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shader: Implement LEA
Diffstat (limited to 'src/shader_recompiler/backend')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.h4
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp4
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp8
3 files changed, 13 insertions, 3 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index bed43c094..1f7d84871 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -132,7 +132,7 @@ void EmitBitCastU64F64(EmitContext& ctx);
132void EmitBitCastF16U16(EmitContext& ctx); 132void EmitBitCastF16U16(EmitContext& ctx);
133Id EmitBitCastF32U32(EmitContext& ctx, Id value); 133Id EmitBitCastF32U32(EmitContext& ctx, Id value);
134void EmitBitCastF64U64(EmitContext& ctx); 134void EmitBitCastF64U64(EmitContext& ctx);
135void EmitPackUint2x32(EmitContext& ctx); 135Id EmitPackUint2x32(EmitContext& ctx, Id value);
136Id EmitUnpackUint2x32(EmitContext& ctx, Id value); 136Id EmitUnpackUint2x32(EmitContext& ctx, Id value);
137Id EmitPackFloat2x16(EmitContext& ctx, Id value); 137Id EmitPackFloat2x16(EmitContext& ctx, Id value);
138Id EmitUnpackFloat2x16(EmitContext& ctx, Id value); 138Id EmitUnpackFloat2x16(EmitContext& ctx, Id value);
@@ -229,9 +229,11 @@ Id EmitISub32(EmitContext& ctx, Id a, Id b);
229void EmitISub64(EmitContext& ctx); 229void EmitISub64(EmitContext& ctx);
230Id EmitIMul32(EmitContext& ctx, Id a, Id b); 230Id EmitIMul32(EmitContext& ctx, Id a, Id b);
231Id EmitINeg32(EmitContext& ctx, Id value); 231Id EmitINeg32(EmitContext& ctx, Id value);
232Id EmitINeg64(EmitContext& ctx, Id value);
232Id EmitIAbs32(EmitContext& ctx, Id value); 233Id EmitIAbs32(EmitContext& ctx, Id value);
233Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift); 234Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift);
234Id EmitShiftRightLogical32(EmitContext& ctx, Id a, Id b); 235Id EmitShiftRightLogical32(EmitContext& ctx, Id a, Id b);
236Id EmitShiftRightLogical64(EmitContext& ctx, Id a, Id b);
235Id EmitShiftRightArithmetic32(EmitContext& ctx, Id a, Id b); 237Id EmitShiftRightArithmetic32(EmitContext& ctx, Id a, Id b);
236Id EmitBitwiseAnd32(EmitContext& ctx, Id a, Id b); 238Id EmitBitwiseAnd32(EmitContext& ctx, Id a, Id b);
237Id EmitBitwiseOr32(EmitContext& ctx, Id a, Id b); 239Id EmitBitwiseOr32(EmitContext& ctx, Id a, Id b);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
index e0d1ba413..93a45d834 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
@@ -30,8 +30,8 @@ void EmitBitCastF64U64(EmitContext&) {
30 throw NotImplementedException("SPIR-V Instruction"); 30 throw NotImplementedException("SPIR-V Instruction");
31} 31}
32 32
33void EmitPackUint2x32(EmitContext&) { 33Id EmitPackUint2x32(EmitContext& ctx, Id value) {
34 throw NotImplementedException("SPIR-V Instruction"); 34 return ctx.OpBitcast(ctx.U64, value);
35} 35}
36 36
37Id EmitUnpackUint2x32(EmitContext& ctx, Id value) { 37Id EmitUnpackUint2x32(EmitContext& ctx, Id value) {
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index 162fb6a91..f5001cdaa 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -62,6 +62,10 @@ Id EmitINeg32(EmitContext& ctx, Id value) {
62 return ctx.OpSNegate(ctx.U32[1], value); 62 return ctx.OpSNegate(ctx.U32[1], value);
63} 63}
64 64
65Id EmitINeg64(EmitContext& ctx, Id value) {
66 return ctx.OpSNegate(ctx.U64, value);
67}
68
65Id EmitIAbs32(EmitContext& ctx, Id value) { 69Id EmitIAbs32(EmitContext& ctx, Id value) {
66 return ctx.OpSAbs(ctx.U32[1], value); 70 return ctx.OpSAbs(ctx.U32[1], value);
67} 71}
@@ -74,6 +78,10 @@ Id EmitShiftRightLogical32(EmitContext& ctx, Id a, Id b) {
74 return ctx.OpShiftRightLogical(ctx.U32[1], a, b); 78 return ctx.OpShiftRightLogical(ctx.U32[1], a, b);
75} 79}
76 80
81Id EmitShiftRightLogical64(EmitContext& ctx, Id a, Id b) {
82 return ctx.OpShiftRightLogical(ctx.U64, a, b);
83}
84
77Id EmitShiftRightArithmetic32(EmitContext& ctx, Id a, Id b) { 85Id EmitShiftRightArithmetic32(EmitContext& ctx, Id a, Id b) {
78 return ctx.OpShiftRightArithmetic(ctx.U32[1], a, b); 86 return ctx.OpShiftRightArithmetic(ctx.U32[1], a, b);
79} 87}