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authorGravatar ameerj2022-01-28 19:00:04 -0500
committerGravatar ameerj2022-01-28 19:00:04 -0500
commit4790ba783970a9dde9d9ce6a528dd8f7edc50ae6 (patch)
tree7ed65721d3be9b2468eeee51dcc7f9550b1034df /src/shader_recompiler/backend
parentMerge pull request #7784 from german77/ds5 (diff)
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spirv_atomic: Define U32x2 storage buffers for 64-bit storage atomics
Some drivers do not support 64-bit atomics, and fallback to atomically modifying U32x2 vectors. This change ensures that U32x2 storage vectors are defined in the spir-v shader when 64-bit atomics are used. Fixes a hang on some devices, notably Intel GPUs, when booting Pokemon Legends Arceus
Diffstat (limited to 'src/shader_recompiler/backend')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
index 0d37b405c..46ba52a25 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
@@ -74,7 +74,7 @@ Id StorageAtomicU64(EmitContext& ctx, const IR::Value& binding, const IR::Value&
74 const auto [scope, semantics]{AtomicArgs(ctx)}; 74 const auto [scope, semantics]{AtomicArgs(ctx)};
75 return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value); 75 return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value);
76 } 76 }
77 LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic"); 77 LOG_WARNING(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
78 const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2, 78 const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
79 binding, offset, sizeof(u32[2]))}; 79 binding, offset, sizeof(u32[2]))};
80 const Id original_value{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))}; 80 const Id original_value{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
@@ -267,7 +267,7 @@ Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const
267 const auto [scope, semantics]{AtomicArgs(ctx)}; 267 const auto [scope, semantics]{AtomicArgs(ctx)};
268 return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value); 268 return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value);
269 } 269 }
270 LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic"); 270 LOG_WARNING(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
271 const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2, 271 const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
272 binding, offset, sizeof(u32[2]))}; 272 binding, offset, sizeof(u32[2]))};
273 const Id original{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))}; 273 const Id original{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};