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| author | 2023-01-25 22:03:15 -0500 | |
|---|---|---|
| committer | 2023-01-25 22:03:15 -0500 | |
| commit | 93cc6e4d992d60a7e8fe73d9ab062e1187775ec5 (patch) | |
| tree | 335599cbf3f86107b0ceca197237c041c33827f0 /src/shader_recompiler/backend/spirv | |
| parent | Merge pull request #9555 from abouvier/catch2-update (diff) | |
| download | yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.tar.gz yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.tar.xz yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.zip | |
shader_recompiler: Remove S32 IR type
The frontend IR opcodes do not distinguish between signed and unsigned integer types.
Fixes broken shaders when IR validation/graphics debugging is enabled for shaders that used BitCastS32F32
Diffstat (limited to 'src/shader_recompiler/backend/spirv')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp | 4 | ||||
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_instructions.h | 1 |
2 files changed, 0 insertions, 5 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp index 50daacd95..c4ca28d11 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp | |||
| @@ -18,10 +18,6 @@ void EmitBitCastU64F64(EmitContext&) { | |||
| 18 | throw NotImplementedException("SPIR-V Instruction"); | 18 | throw NotImplementedException("SPIR-V Instruction"); |
| 19 | } | 19 | } |
| 20 | 20 | ||
| 21 | void EmitBitCastS32F32(EmitContext&) { | ||
| 22 | throw NotImplementedException("SPIR-V Instruction"); | ||
| 23 | } | ||
| 24 | |||
| 25 | void EmitBitCastF16U16(EmitContext&) { | 21 | void EmitBitCastF16U16(EmitContext&) { |
| 26 | throw NotImplementedException("SPIR-V Instruction"); | 22 | throw NotImplementedException("SPIR-V Instruction"); |
| 27 | } | 23 | } |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h index e31cdc5e8..db12e8176 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h | |||
| @@ -179,7 +179,6 @@ Id EmitSelectF64(EmitContext& ctx, Id cond, Id true_value, Id false_value); | |||
| 179 | void EmitBitCastU16F16(EmitContext& ctx); | 179 | void EmitBitCastU16F16(EmitContext& ctx); |
| 180 | Id EmitBitCastU32F32(EmitContext& ctx, Id value); | 180 | Id EmitBitCastU32F32(EmitContext& ctx, Id value); |
| 181 | void EmitBitCastU64F64(EmitContext& ctx); | 181 | void EmitBitCastU64F64(EmitContext& ctx); |
| 182 | void EmitBitCastS32F32(EmitContext& ctx); | ||
| 183 | void EmitBitCastF16U16(EmitContext&); | 182 | void EmitBitCastF16U16(EmitContext&); |
| 184 | Id EmitBitCastF32U32(EmitContext& ctx, Id value); | 183 | Id EmitBitCastF32U32(EmitContext& ctx, Id value); |
| 185 | void EmitBitCastF64U64(EmitContext& ctx); | 184 | void EmitBitCastF64U64(EmitContext& ctx); |