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authorGravatar lat9nq2021-07-08 17:22:31 -0400
committerGravatar ameerj2021-07-22 21:51:35 -0400
commit373f75d944473731408d7a72c967d5c4b37af5bb (patch)
treea6af34845e9cae1429bbd004a36b324bb02f9932 /src/shader_recompiler/backend/spirv
parentshader: Comment why the array component is not read in TMML (diff)
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shader: Add shader loop safety check settings
Also add a setting for enable Nsight Aftermath.
Diffstat (limited to 'src/shader_recompiler/backend/spirv')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp24
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_instructions.h2
2 files changed, 18 insertions, 8 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index 442a958a5..42fff74e3 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -163,35 +163,43 @@ Id GetCbufElement(EmitContext& ctx, Id vector, const IR::Value& offset, u32 inde
163} // Anonymous namespace 163} // Anonymous namespace
164 164
165void EmitGetRegister(EmitContext&) { 165void EmitGetRegister(EmitContext&) {
166 throw NotImplementedException("SPIR-V Instruction"); 166 throw LogicError("Unreachable instruction");
167} 167}
168 168
169void EmitSetRegister(EmitContext&) { 169void EmitSetRegister(EmitContext&) {
170 throw NotImplementedException("SPIR-V Instruction"); 170 throw LogicError("Unreachable instruction");
171} 171}
172 172
173void EmitGetPred(EmitContext&) { 173void EmitGetPred(EmitContext&) {
174 throw NotImplementedException("SPIR-V Instruction"); 174 throw LogicError("Unreachable instruction");
175} 175}
176 176
177void EmitSetPred(EmitContext&) { 177void EmitSetPred(EmitContext&) {
178 throw NotImplementedException("SPIR-V Instruction"); 178 throw LogicError("Unreachable instruction");
179} 179}
180 180
181void EmitSetGotoVariable(EmitContext&) { 181void EmitSetGotoVariable(EmitContext&) {
182 throw NotImplementedException("SPIR-V Instruction"); 182 throw LogicError("Unreachable instruction");
183} 183}
184 184
185void EmitGetGotoVariable(EmitContext&) { 185void EmitGetGotoVariable(EmitContext&) {
186 throw NotImplementedException("SPIR-V Instruction"); 186 throw LogicError("Unreachable instruction");
187} 187}
188 188
189void EmitSetIndirectBranchVariable(EmitContext&) { 189void EmitSetIndirectBranchVariable(EmitContext&) {
190 throw NotImplementedException("SPIR-V Instruction"); 190 throw LogicError("Unreachable instruction");
191} 191}
192 192
193void EmitGetIndirectBranchVariable(EmitContext&) { 193void EmitGetIndirectBranchVariable(EmitContext&) {
194 throw NotImplementedException("SPIR-V Instruction"); 194 throw LogicError("Unreachable instruction");
195}
196
197void EmitSetLoopSafetyVariable(EmitContext&) {
198 throw LogicError("Unreachable instruction");
199}
200
201void EmitGetLoopSafetyVariable(EmitContext&) {
202 throw LogicError("Unreachable instruction");
195} 203}
196 204
197Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) { 205Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
index 1181e7b4f..e3e5b03fe 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
@@ -43,6 +43,8 @@ void EmitSetGotoVariable(EmitContext& ctx);
43void EmitGetGotoVariable(EmitContext& ctx); 43void EmitGetGotoVariable(EmitContext& ctx);
44void EmitSetIndirectBranchVariable(EmitContext& ctx); 44void EmitSetIndirectBranchVariable(EmitContext& ctx);
45void EmitGetIndirectBranchVariable(EmitContext& ctx); 45void EmitGetIndirectBranchVariable(EmitContext& ctx);
46void EmitSetLoopSafetyVariable(EmitContext& ctx);
47void EmitGetLoopSafetyVariable(EmitContext& ctx);
46Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); 48Id EmitGetCbufU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
47Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); 49Id EmitGetCbufS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
48Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); 50Id EmitGetCbufU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);