diff options
| author | 2021-02-14 20:15:42 -0300 | |
|---|---|---|
| committer | 2021-07-22 21:51:22 -0400 | |
| commit | cbfb7d182a4e90e4e263696d1fca35e47d3eabb4 (patch) | |
| tree | a8d384aa0daefdfafd9b61330e06b1cf7ac40ea6 /src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp | |
| parent | shader: Misc fixes (diff) | |
| download | yuzu-cbfb7d182a4e90e4e263696d1fca35e47d3eabb4.tar.gz yuzu-cbfb7d182a4e90e4e263696d1fca35e47d3eabb4.tar.xz yuzu-cbfb7d182a4e90e4e263696d1fca35e47d3eabb4.zip | |
shader: Support SSA loops on IR
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp index 859b60a95..a6f542360 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp | |||
| @@ -10,19 +10,19 @@ Id EmitSPIRV::EmitUndefU1(EmitContext& ctx) { | |||
| 10 | return ctx.OpUndef(ctx.u1); | 10 | return ctx.OpUndef(ctx.u1); |
| 11 | } | 11 | } |
| 12 | 12 | ||
| 13 | void EmitSPIRV::EmitUndefU8(EmitContext&) { | 13 | Id EmitSPIRV::EmitUndefU8(EmitContext&) { |
| 14 | throw NotImplementedException("SPIR-V Instruction"); | 14 | throw NotImplementedException("SPIR-V Instruction"); |
| 15 | } | 15 | } |
| 16 | 16 | ||
| 17 | void EmitSPIRV::EmitUndefU16(EmitContext&) { | 17 | Id EmitSPIRV::EmitUndefU16(EmitContext&) { |
| 18 | throw NotImplementedException("SPIR-V Instruction"); | 18 | throw NotImplementedException("SPIR-V Instruction"); |
| 19 | } | 19 | } |
| 20 | 20 | ||
| 21 | void EmitSPIRV::EmitUndefU32(EmitContext&) { | 21 | Id EmitSPIRV::EmitUndefU32(EmitContext& ctx) { |
| 22 | throw NotImplementedException("SPIR-V Instruction"); | 22 | return ctx.OpUndef(ctx.u32[1]); |
| 23 | } | 23 | } |
| 24 | 24 | ||
| 25 | void EmitSPIRV::EmitUndefU64(EmitContext&) { | 25 | Id EmitSPIRV::EmitUndefU64(EmitContext&) { |
| 26 | throw NotImplementedException("SPIR-V Instruction"); | 26 | throw NotImplementedException("SPIR-V Instruction"); |
| 27 | } | 27 | } |
| 28 | 28 | ||