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| author | 2021-07-25 11:39:04 -0700 | |
|---|---|---|
| committer | 2021-07-25 11:39:04 -0700 | |
| commit | 98b26b6e126d4775fdf3f773fe8a8ac808a8ff8f (patch) | |
| tree | 816faa96c2c4d291825063433331a8ea4b3d08f1 /src/shader_recompiler/backend/spirv/emit_spirv_select.cpp | |
| parent | Merge pull request #6699 from lat9nq/common-threads (diff) | |
| parent | shader: Support out of bound local memory reads and immediate writes (diff) | |
| download | yuzu-98b26b6e126d4775fdf3f773fe8a8ac808a8ff8f.tar.gz yuzu-98b26b6e126d4775fdf3f773fe8a8ac808a8ff8f.tar.xz yuzu-98b26b6e126d4775fdf3f773fe8a8ac808a8ff8f.zip | |
Merge pull request #6585 from ameerj/hades
Shader Decompiler Rewrite
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_select.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_select.cpp | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp new file mode 100644 index 000000000..c5b4f4720 --- /dev/null +++ b/src/shader_recompiler/backend/spirv/emit_spirv_select.cpp | |||
| @@ -0,0 +1,42 @@ | |||
| 1 | // Copyright 2021 yuzu Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #include "shader_recompiler/backend/spirv/emit_spirv.h" | ||
| 6 | #include "shader_recompiler/backend/spirv/emit_spirv_instructions.h" | ||
| 7 | |||
| 8 | namespace Shader::Backend::SPIRV { | ||
| 9 | |||
| 10 | Id EmitSelectU1(EmitContext& ctx, Id cond, Id true_value, Id false_value) { | ||
| 11 | return ctx.OpSelect(ctx.U1, cond, true_value, false_value); | ||
| 12 | } | ||
| 13 | |||
| 14 | Id EmitSelectU8(EmitContext&, Id, Id, Id) { | ||
| 15 | throw NotImplementedException("SPIR-V Instruction"); | ||
| 16 | } | ||
| 17 | |||
| 18 | Id EmitSelectU16(EmitContext& ctx, Id cond, Id true_value, Id false_value) { | ||
| 19 | return ctx.OpSelect(ctx.U16, cond, true_value, false_value); | ||
| 20 | } | ||
| 21 | |||
| 22 | Id EmitSelectU32(EmitContext& ctx, Id cond, Id true_value, Id false_value) { | ||
| 23 | return ctx.OpSelect(ctx.U32[1], cond, true_value, false_value); | ||
| 24 | } | ||
| 25 | |||
| 26 | Id EmitSelectU64(EmitContext& ctx, Id cond, Id true_value, Id false_value) { | ||
| 27 | return ctx.OpSelect(ctx.U64, cond, true_value, false_value); | ||
| 28 | } | ||
| 29 | |||
| 30 | Id EmitSelectF16(EmitContext& ctx, Id cond, Id true_value, Id false_value) { | ||
| 31 | return ctx.OpSelect(ctx.F16[1], cond, true_value, false_value); | ||
| 32 | } | ||
| 33 | |||
| 34 | Id EmitSelectF32(EmitContext& ctx, Id cond, Id true_value, Id false_value) { | ||
| 35 | return ctx.OpSelect(ctx.F32[1], cond, true_value, false_value); | ||
| 36 | } | ||
| 37 | |||
| 38 | Id EmitSelectF64(EmitContext& ctx, Id cond, Id true_value, Id false_value) { | ||
| 39 | return ctx.OpSelect(ctx.F64[1], cond, true_value, false_value); | ||
| 40 | } | ||
| 41 | |||
| 42 | } // namespace Shader::Backend::SPIRV | ||