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| author | 2021-04-19 16:33:23 -0300 | |
|---|---|---|
| committer | 2021-07-22 21:51:28 -0400 | |
| commit | 7018e524f5e6217b3259333acc4ea09ad036d331 (patch) | |
| tree | 58e750b08d48e018accc4de9a05cb483d825904c /src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |
| parent | spirv: Fix ViewportMask (diff) | |
| download | yuzu-7018e524f5e6217b3259333acc4ea09ad036d331.tar.gz yuzu-7018e524f5e6217b3259333acc4ea09ad036d331.tar.xz yuzu-7018e524f5e6217b3259333acc4ea09ad036d331.zip | |
shader: Add NVN storage buffer fallbacks
When we can't track the SSBO origin of a global memory instruction,
leave it as a global memory operation and assume these pointers are in
the NVN storage buffer slots, then apply a linear search in the shader's
runtime.
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index c12d0a513..cd5b1f42c 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |||
| @@ -55,16 +55,16 @@ Id EmitIAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b) { | |||
| 55 | return result; | 55 | return result; |
| 56 | } | 56 | } |
| 57 | 57 | ||
| 58 | void EmitIAdd64(EmitContext&) { | 58 | Id EmitIAdd64(EmitContext& ctx, Id a, Id b) { |
| 59 | throw NotImplementedException("SPIR-V Instruction"); | 59 | return ctx.OpIAdd(ctx.U64, a, b); |
| 60 | } | 60 | } |
| 61 | 61 | ||
| 62 | Id EmitISub32(EmitContext& ctx, Id a, Id b) { | 62 | Id EmitISub32(EmitContext& ctx, Id a, Id b) { |
| 63 | return ctx.OpISub(ctx.U32[1], a, b); | 63 | return ctx.OpISub(ctx.U32[1], a, b); |
| 64 | } | 64 | } |
| 65 | 65 | ||
| 66 | void EmitISub64(EmitContext&) { | 66 | Id EmitISub64(EmitContext& ctx, Id a, Id b) { |
| 67 | throw NotImplementedException("SPIR-V Instruction"); | 67 | return ctx.OpISub(ctx.U64, a, b); |
| 68 | } | 68 | } |
| 69 | 69 | ||
| 70 | Id EmitIMul32(EmitContext& ctx, Id a, Id b) { | 70 | Id EmitIMul32(EmitContext& ctx, Id a, Id b) { |