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| author | 2021-03-24 23:41:55 +0100 | |
|---|---|---|
| committer | 2021-07-22 21:51:24 -0400 | |
| commit | c7c518e280d1ac04adb08d45145690fd06ac7b18 (patch) | |
| tree | 1bce4c12238600828bef6bdf0c92da6f69c054b1 /src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | |
| parent | shader: Implement SHFL (diff) | |
| download | yuzu-c7c518e280d1ac04adb08d45145690fd06ac7b18.tar.gz yuzu-c7c518e280d1ac04adb08d45145690fd06ac7b18.tar.xz yuzu-c7c518e280d1ac04adb08d45145690fd06ac7b18.zip | |
shader: Implement TLD4 and TLD4_B
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_image.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp index f75152911..589013773 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | |||
| @@ -30,6 +30,12 @@ public: | |||
| 30 | } | 30 | } |
| 31 | } | 31 | } |
| 32 | 32 | ||
| 33 | explicit ImageOperands([[maybe_unused]] EmitContext& ctx, Id offset) { | ||
| 34 | if (Sirit::ValidId(offset)) { | ||
| 35 | Add(spv::ImageOperandsMask::Offset, offset); | ||
| 36 | } | ||
| 37 | } | ||
| 38 | |||
| 33 | void Add(spv::ImageOperandsMask new_mask, Id value) { | 39 | void Add(spv::ImageOperandsMask new_mask, Id value) { |
| 34 | mask = static_cast<spv::ImageOperandsMask>(static_cast<unsigned>(mask) | | 40 | mask = static_cast<spv::ImageOperandsMask>(static_cast<unsigned>(mask) | |
| 35 | static_cast<unsigned>(new_mask)); | 41 | static_cast<unsigned>(new_mask)); |
| @@ -98,6 +104,14 @@ Id EmitBindlessImageSampleDrefExplicitLod(EmitContext&) { | |||
| 98 | throw LogicError("Unreachable instruction"); | 104 | throw LogicError("Unreachable instruction"); |
| 99 | } | 105 | } |
| 100 | 106 | ||
| 107 | Id EmitBindlessImageGather(EmitContext&) { | ||
| 108 | throw LogicError("Unreachable instruction"); | ||
| 109 | } | ||
| 110 | |||
| 111 | Id EmitBindlessImageGatherDref(EmitContext&) { | ||
| 112 | throw LogicError("Unreachable instruction"); | ||
| 113 | } | ||
| 114 | |||
| 101 | Id EmitBoundImageSampleImplicitLod(EmitContext&) { | 115 | Id EmitBoundImageSampleImplicitLod(EmitContext&) { |
| 102 | throw LogicError("Unreachable instruction"); | 116 | throw LogicError("Unreachable instruction"); |
| 103 | } | 117 | } |
| @@ -114,6 +128,14 @@ Id EmitBoundImageSampleDrefExplicitLod(EmitContext&) { | |||
| 114 | throw LogicError("Unreachable instruction"); | 128 | throw LogicError("Unreachable instruction"); |
| 115 | } | 129 | } |
| 116 | 130 | ||
| 131 | Id EmitBoundImageGather(EmitContext&) { | ||
| 132 | throw LogicError("Unreachable instruction"); | ||
| 133 | } | ||
| 134 | |||
| 135 | Id EmitBoundImageGatherDref(EmitContext&) { | ||
| 136 | throw LogicError("Unreachable instruction"); | ||
| 137 | } | ||
| 138 | |||
| 117 | Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | 139 | Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, |
| 118 | Id bias_lc, Id offset) { | 140 | Id bias_lc, Id offset) { |
| 119 | const auto info{inst->Flags<IR::TextureInstInfo>()}; | 141 | const auto info{inst->Flags<IR::TextureInstInfo>()}; |
| @@ -152,4 +174,22 @@ Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Va | |||
| 152 | Texture(ctx, index), coords, dref, operands.Mask(), operands.Span()); | 174 | Texture(ctx, index), coords, dref, operands.Mask(), operands.Span()); |
| 153 | } | 175 | } |
| 154 | 176 | ||
| 177 | Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset, | ||
| 178 | [[maybe_unused]] Id offset2) { | ||
| 179 | const auto info{inst->Flags<IR::TextureInstInfo>()}; | ||
| 180 | const ImageOperands operands(ctx, offset); | ||
| 181 | return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst, | ||
| 182 | ctx.F32[4], Texture(ctx, index), coords, | ||
| 183 | ctx.Constant(ctx.U32[1], info.gather_component.Value()), operands.Mask(), | ||
| 184 | operands.Span()); | ||
| 185 | } | ||
| 186 | |||
| 187 | Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | ||
| 188 | Id offset, [[maybe_unused]] Id offset2, Id dref) { | ||
| 189 | const auto info{inst->Flags<IR::TextureInstInfo>()}; | ||
| 190 | const ImageOperands operands(ctx, offset); | ||
| 191 | return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst, | ||
| 192 | ctx.F32[4], Texture(ctx, index), coords, dref, operands.Mask(), operands.Span()); | ||
| 193 | } | ||
| 194 | |||
| 155 | } // namespace Shader::Backend::SPIRV | 195 | } // namespace Shader::Backend::SPIRV |