diff options
| author | 2021-03-26 19:24:50 +0100 | |
|---|---|---|
| committer | 2021-07-22 21:51:24 -0400 | |
| commit | b5db38f50e9f81964bf0cc946e4ed5b00fe564d0 (patch) | |
| tree | fefc872d1da6481c8478e4da0381faaaad6f4b75 /src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | |
| parent | shader: Implement TLD4.PTP (diff) | |
| download | yuzu-b5db38f50e9f81964bf0cc946e4ed5b00fe564d0.tar.gz yuzu-b5db38f50e9f81964bf0cc946e4ed5b00fe564d0.tar.xz yuzu-b5db38f50e9f81964bf0cc946e4ed5b00fe564d0.zip | |
shader: Add IR opcode for ImageFetch
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_image.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp index 776afd4ab..13bc8831f 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp | |||
| @@ -39,6 +39,18 @@ public: | |||
| 39 | } | 39 | } |
| 40 | } | 40 | } |
| 41 | 41 | ||
| 42 | explicit ImageOperands([[maybe_unused]] EmitContext& ctx, Id offset, Id lod, Id ms) { | ||
| 43 | if (Sirit::ValidId(lod)) { | ||
| 44 | Add(spv::ImageOperandsMask::Lod, lod); | ||
| 45 | } | ||
| 46 | if (Sirit::ValidId(offset)) { | ||
| 47 | Add(spv::ImageOperandsMask::Offset, offset); | ||
| 48 | } | ||
| 49 | if (Sirit::ValidId(ms)) { | ||
| 50 | Add(spv::ImageOperandsMask::Sample, ms); | ||
| 51 | } | ||
| 52 | } | ||
| 53 | |||
| 42 | void Add(spv::ImageOperandsMask new_mask, Id value) { | 54 | void Add(spv::ImageOperandsMask new_mask, Id value) { |
| 43 | mask = static_cast<spv::ImageOperandsMask>(static_cast<unsigned>(mask) | | 55 | mask = static_cast<spv::ImageOperandsMask>(static_cast<unsigned>(mask) | |
| 44 | static_cast<unsigned>(new_mask)); | 56 | static_cast<unsigned>(new_mask)); |
| @@ -115,6 +127,10 @@ Id EmitBindlessImageGatherDref(EmitContext&) { | |||
| 115 | throw LogicError("Unreachable instruction"); | 127 | throw LogicError("Unreachable instruction"); |
| 116 | } | 128 | } |
| 117 | 129 | ||
| 130 | Id EmitBindlessImageFetch(EmitContext&) { | ||
| 131 | throw LogicError("Unreachable instruction"); | ||
| 132 | } | ||
| 133 | |||
| 118 | Id EmitBoundImageSampleImplicitLod(EmitContext&) { | 134 | Id EmitBoundImageSampleImplicitLod(EmitContext&) { |
| 119 | throw LogicError("Unreachable instruction"); | 135 | throw LogicError("Unreachable instruction"); |
| 120 | } | 136 | } |
| @@ -139,6 +155,10 @@ Id EmitBoundImageGatherDref(EmitContext&) { | |||
| 139 | throw LogicError("Unreachable instruction"); | 155 | throw LogicError("Unreachable instruction"); |
| 140 | } | 156 | } |
| 141 | 157 | ||
| 158 | Id EmitBoundImageFetch(EmitContext&) { | ||
| 159 | throw LogicError("Unreachable instruction"); | ||
| 160 | } | ||
| 161 | |||
| 142 | Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | 162 | Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, |
| 143 | Id bias_lc, Id offset) { | 163 | Id bias_lc, Id offset) { |
| 144 | const auto info{inst->Flags<IR::TextureInstInfo>()}; | 164 | const auto info{inst->Flags<IR::TextureInstInfo>()}; |
| @@ -178,7 +198,7 @@ Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Va | |||
| 178 | } | 198 | } |
| 179 | 199 | ||
| 180 | Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset, | 200 | Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset, |
| 181 | [[maybe_unused]] Id offset2) { | 201 | Id offset2) { |
| 182 | const auto info{inst->Flags<IR::TextureInstInfo>()}; | 202 | const auto info{inst->Flags<IR::TextureInstInfo>()}; |
| 183 | const ImageOperands operands(ctx, offset, offset2); | 203 | const ImageOperands operands(ctx, offset, offset2); |
| 184 | return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst, | 204 | return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst, |
| @@ -188,11 +208,19 @@ Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id | |||
| 188 | } | 208 | } |
| 189 | 209 | ||
| 190 | Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, | 210 | Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, |
| 191 | Id offset, [[maybe_unused]] Id offset2, Id dref) { | 211 | Id offset, Id offset2, Id dref) { |
| 192 | const auto info{inst->Flags<IR::TextureInstInfo>()}; | 212 | const auto info{inst->Flags<IR::TextureInstInfo>()}; |
| 193 | const ImageOperands operands(ctx, offset, offset2); | 213 | const ImageOperands operands(ctx, offset, offset2); |
| 194 | return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst, | 214 | return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst, |
| 195 | ctx.F32[4], Texture(ctx, index), coords, dref, operands.Mask(), operands.Span()); | 215 | ctx.F32[4], Texture(ctx, index), coords, dref, operands.Mask(), operands.Span()); |
| 196 | } | 216 | } |
| 197 | 217 | ||
| 218 | Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset, | ||
| 219 | Id lod, Id ms) { | ||
| 220 | const auto info{inst->Flags<IR::TextureInstInfo>()}; | ||
| 221 | const ImageOperands operands(ctx, offset, lod, ms); | ||
| 222 | return Emit(&EmitContext::OpImageSparseFetch, &EmitContext::OpImageFetch, ctx, inst, ctx.F32[4], | ||
| 223 | Texture(ctx, index), coords, operands.Mask(), operands.Span()); | ||
| 224 | } | ||
| 225 | |||
| 198 | } // namespace Shader::Backend::SPIRV | 226 | } // namespace Shader::Backend::SPIRV |