summaryrefslogtreecommitdiff
path: root/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
diff options
context:
space:
mode:
authorGravatar ReinUsesLisp2021-03-03 03:07:19 -0300
committerGravatar ameerj2021-07-22 21:51:23 -0400
commit4006929c986a2e0e52429fe21201a7ad5ca3fea9 (patch)
tree9f4a1ffa7782ed76db5561e107e8ae9f71f63a15 /src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
parentshader: Implement LOP and LOP3 (diff)
downloadyuzu-4006929c986a2e0e52429fe21201a7ad5ca3fea9.tar.gz
yuzu-4006929c986a2e0e52429fe21201a7ad5ca3fea9.tar.xz
yuzu-4006929c986a2e0e52429fe21201a7ad5ca3fea9.zip
shader: Implement HADD2
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp72
1 files changed, 60 insertions, 12 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
index c950854a0..616e63676 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
@@ -30,16 +30,28 @@ Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index) {
30 return ctx.OpCompositeExtract(ctx.U32[1], composite, index); 30 return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
31} 31}
32 32
33void EmitCompositeConstructF16x2(EmitContext&) { 33Id EmitCompositeInsertU32x2(EmitContext& ctx, Id composite, Id object, u32 index) {
34 throw NotImplementedException("SPIR-V Instruction"); 34 return ctx.OpCompositeInsert(ctx.U32[2], object, composite, index);
35} 35}
36 36
37void EmitCompositeConstructF16x3(EmitContext&) { 37Id EmitCompositeInsertU32x3(EmitContext& ctx, Id composite, Id object, u32 index) {
38 throw NotImplementedException("SPIR-V Instruction"); 38 return ctx.OpCompositeInsert(ctx.U32[3], object, composite, index);
39} 39}
40 40
41void EmitCompositeConstructF16x4(EmitContext&) { 41Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index) {
42 throw NotImplementedException("SPIR-V Instruction"); 42 return ctx.OpCompositeInsert(ctx.U32[4], object, composite, index);
43}
44
45Id EmitCompositeConstructF16x2(EmitContext& ctx, Id e1, Id e2) {
46 return ctx.OpCompositeConstruct(ctx.F16[2], e1, e2);
47}
48
49Id EmitCompositeConstructF16x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
50 return ctx.OpCompositeConstruct(ctx.F16[3], e1, e2, e3);
51}
52
53Id EmitCompositeConstructF16x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
54 return ctx.OpCompositeConstruct(ctx.F16[4], e1, e2, e3, e4);
43} 55}
44 56
45Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index) { 57Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index) {
@@ -54,16 +66,28 @@ Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index) {
54 return ctx.OpCompositeExtract(ctx.F16[1], composite, index); 66 return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
55} 67}
56 68
57void EmitCompositeConstructF32x2(EmitContext&) { 69Id EmitCompositeInsertF16x2(EmitContext& ctx, Id composite, Id object, u32 index) {
58 throw NotImplementedException("SPIR-V Instruction"); 70 return ctx.OpCompositeInsert(ctx.F16[2], object, composite, index);
59} 71}
60 72
61void EmitCompositeConstructF32x3(EmitContext&) { 73Id EmitCompositeInsertF16x3(EmitContext& ctx, Id composite, Id object, u32 index) {
62 throw NotImplementedException("SPIR-V Instruction"); 74 return ctx.OpCompositeInsert(ctx.F16[3], object, composite, index);
63} 75}
64 76
65void EmitCompositeConstructF32x4(EmitContext&) { 77Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index) {
66 throw NotImplementedException("SPIR-V Instruction"); 78 return ctx.OpCompositeInsert(ctx.F16[4], object, composite, index);
79}
80
81Id EmitCompositeConstructF32x2(EmitContext& ctx, Id e1, Id e2) {
82 return ctx.OpCompositeConstruct(ctx.F32[2], e1, e2);
83}
84
85Id EmitCompositeConstructF32x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
86 return ctx.OpCompositeConstruct(ctx.F32[3], e1, e2, e3);
87}
88
89Id EmitCompositeConstructF32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
90 return ctx.OpCompositeConstruct(ctx.F32[4], e1, e2, e3, e4);
67} 91}
68 92
69Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index) { 93Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index) {
@@ -78,6 +102,18 @@ Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index) {
78 return ctx.OpCompositeExtract(ctx.F32[1], composite, index); 102 return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
79} 103}
80 104
105Id EmitCompositeInsertF32x2(EmitContext& ctx, Id composite, Id object, u32 index) {
106 return ctx.OpCompositeInsert(ctx.F32[2], object, composite, index);
107}
108
109Id EmitCompositeInsertF32x3(EmitContext& ctx, Id composite, Id object, u32 index) {
110 return ctx.OpCompositeInsert(ctx.F32[3], object, composite, index);
111}
112
113Id EmitCompositeInsertF32x4(EmitContext& ctx, Id composite, Id object, u32 index) {
114 return ctx.OpCompositeInsert(ctx.F32[4], object, composite, index);
115}
116
81void EmitCompositeConstructF64x2(EmitContext&) { 117void EmitCompositeConstructF64x2(EmitContext&) {
82 throw NotImplementedException("SPIR-V Instruction"); 118 throw NotImplementedException("SPIR-V Instruction");
83} 119}
@@ -102,4 +138,16 @@ void EmitCompositeExtractF64x4(EmitContext&) {
102 throw NotImplementedException("SPIR-V Instruction"); 138 throw NotImplementedException("SPIR-V Instruction");
103} 139}
104 140
141Id EmitCompositeInsertF64x2(EmitContext& ctx, Id composite, Id object, u32 index) {
142 return ctx.OpCompositeInsert(ctx.F64[2], object, composite, index);
143}
144
145Id EmitCompositeInsertF64x3(EmitContext& ctx, Id composite, Id object, u32 index) {
146 return ctx.OpCompositeInsert(ctx.F64[3], object, composite, index);
147}
148
149Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index) {
150 return ctx.OpCompositeInsert(ctx.F64[4], object, composite, index);
151}
152
105} // namespace Shader::Backend::SPIRV 153} // namespace Shader::Backend::SPIRV