diff options
| author |  ReinUsesLisp | 2021-04-13 05:32:21 -0300 |
|---|---|---|
| committer |  ameerj | 2021-07-22 21:51:27 -0400 |
| commit | fa75b9b0626c8e118e27207dd1e82e2f415fc0bc (patch) | |
| tree | 29738f645876c19fd561a39b8f9d62799bf92ef9 /src/shader_recompiler/backend/spirv/emit_spirv.h | |
| parent | shader: Fix fixed pipeline point size on geometry shaders (diff) | |
| download | yuzu-fa75b9b0626c8e118e27207dd1e82e2f415fc0bc.tar.gz yuzu-fa75b9b0626c8e118e27207dd1e82e2f415fc0bc.tar.xz yuzu-fa75b9b0626c8e118e27207dd1e82e2f415fc0bc.zip | |
spirv: Rework storage buffers and shader memory
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv.h')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv.h | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h index c0e1b8833..55b2edba0 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv.h | |||
| @@ -89,17 +89,21 @@ void EmitWriteGlobalS16(EmitContext& ctx); | |||
| 89 | void EmitWriteGlobal32(EmitContext& ctx); | 89 | void EmitWriteGlobal32(EmitContext& ctx); |
| 90 | void EmitWriteGlobal64(EmitContext& ctx); | 90 | void EmitWriteGlobal64(EmitContext& ctx); |
| 91 | void EmitWriteGlobal128(EmitContext& ctx); | 91 | void EmitWriteGlobal128(EmitContext& ctx); |
| 92 | void EmitLoadStorageU8(EmitContext& ctx); | 92 | Id EmitLoadStorageU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); |
| 93 | void EmitLoadStorageS8(EmitContext& ctx); | 93 | Id EmitLoadStorageS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); |
| 94 | void EmitLoadStorageU16(EmitContext& ctx); | 94 | Id EmitLoadStorageU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); |
| 95 | void EmitLoadStorageS16(EmitContext& ctx); | 95 | Id EmitLoadStorageS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); |
| 96 | Id EmitLoadStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | 96 | Id EmitLoadStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); |
| 97 | Id EmitLoadStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | 97 | Id EmitLoadStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); |
| 98 | Id EmitLoadStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); | 98 | Id EmitLoadStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset); |
| 99 | void EmitWriteStorageU8(EmitContext& ctx); | 99 | void EmitWriteStorageU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, |
| 100 | void EmitWriteStorageS8(EmitContext& ctx); | 100 | Id value); |
| 101 | void EmitWriteStorageU16(EmitContext& ctx); | 101 | void EmitWriteStorageS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, |
| 102 | void EmitWriteStorageS16(EmitContext& ctx); | 102 | Id value); |
| 103 | void EmitWriteStorageU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 104 | Id value); | ||
| 105 | void EmitWriteStorageS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 106 | Id value); | ||
| 103 | void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | 107 | void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, |
| 104 | Id value); | 108 | Id value); |
| 105 | void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | 109 | void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, |