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| author | 2021-03-07 22:01:22 -0500 | |
|---|---|---|
| committer | 2021-07-22 21:51:23 -0400 | |
| commit | 7d6ba5b9840a4ba00a9b0f207c1c119d60dcf8b7 (patch) | |
| tree | d2e7976c767b5b292f0a0318783869045ff0fda6 /src/shader_recompiler/backend/spirv/emit_spirv.h | |
| parent | shader: Implement SHF (diff) | |
| download | yuzu-7d6ba5b9840a4ba00a9b0f207c1c119d60dcf8b7.tar.gz yuzu-7d6ba5b9840a4ba00a9b0f207c1c119d60dcf8b7.tar.xz yuzu-7d6ba5b9840a4ba00a9b0f207c1c119d60dcf8b7.zip | |
shader: Implement R2P
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv.h')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h index bf1b5ace6..92387ca28 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv.h | |||
| @@ -120,6 +120,7 @@ void EmitCompositeExtractF64x4(EmitContext& ctx); | |||
| 120 | Id EmitCompositeInsertF64x2(EmitContext& ctx, Id composite, Id object, u32 index); | 120 | Id EmitCompositeInsertF64x2(EmitContext& ctx, Id composite, Id object, u32 index); |
| 121 | Id EmitCompositeInsertF64x3(EmitContext& ctx, Id composite, Id object, u32 index); | 121 | Id EmitCompositeInsertF64x3(EmitContext& ctx, Id composite, Id object, u32 index); |
| 122 | Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index); | 122 | Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index); |
| 123 | Id EmitSelectU1(EmitContext& ctx, Id cond, Id true_value, Id false_value); | ||
| 123 | Id EmitSelectU8(EmitContext& ctx, Id cond, Id true_value, Id false_value); | 124 | Id EmitSelectU8(EmitContext& ctx, Id cond, Id true_value, Id false_value); |
| 124 | Id EmitSelectU16(EmitContext& ctx, Id cond, Id true_value, Id false_value); | 125 | Id EmitSelectU16(EmitContext& ctx, Id cond, Id true_value, Id false_value); |
| 125 | Id EmitSelectU32(EmitContext& ctx, Id cond, Id true_value, Id false_value); | 126 | Id EmitSelectU32(EmitContext& ctx, Id cond, Id true_value, Id false_value); |
| @@ -242,7 +243,7 @@ Id EmitBitwiseOr32(EmitContext& ctx, Id a, Id b); | |||
| 242 | Id EmitBitwiseXor32(EmitContext& ctx, Id a, Id b); | 243 | Id EmitBitwiseXor32(EmitContext& ctx, Id a, Id b); |
| 243 | Id EmitBitFieldInsert(EmitContext& ctx, Id base, Id insert, Id offset, Id count); | 244 | Id EmitBitFieldInsert(EmitContext& ctx, Id base, Id insert, Id offset, Id count); |
| 244 | Id EmitBitFieldSExtract(EmitContext& ctx, Id base, Id offset, Id count); | 245 | Id EmitBitFieldSExtract(EmitContext& ctx, Id base, Id offset, Id count); |
| 245 | Id EmitBitFieldUExtract(EmitContext& ctx, Id base, Id offset, Id count); | 246 | Id EmitBitFieldUExtract(EmitContext& ctx, IR::Inst* inst, Id base, Id offset, Id count); |
| 246 | Id EmitBitReverse32(EmitContext& ctx, Id value); | 247 | Id EmitBitReverse32(EmitContext& ctx, Id value); |
| 247 | Id EmitBitCount32(EmitContext& ctx, Id value); | 248 | Id EmitBitCount32(EmitContext& ctx, Id value); |
| 248 | Id EmitBitwiseNot32(EmitContext& ctx, Id value); | 249 | Id EmitBitwiseNot32(EmitContext& ctx, Id value); |