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| author | 2021-04-11 02:07:02 -0400 | |
|---|---|---|
| committer | 2021-07-22 21:51:27 -0400 | |
| commit | 3db2b3effa953ae66457b7a19b419fc4db2c4801 (patch) | |
| tree | 04c73897a74be053a610edf60703c72e985ee590 /src/shader_recompiler/backend/spirv/emit_spirv.h | |
| parent | nsight_aftermath_tracker: Report used shaders to Nsight Aftermath (diff) | |
| download | yuzu-3db2b3effa953ae66457b7a19b419fc4db2c4801.tar.gz yuzu-3db2b3effa953ae66457b7a19b419fc4db2c4801.tar.xz yuzu-3db2b3effa953ae66457b7a19b419fc4db2c4801.zip | |
shader: Implement ATOM/S and RED
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv.h')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv.h | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h index 12b7993ae..a3398a605 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv.h | |||
| @@ -306,6 +306,101 @@ Id EmitUGreaterThan(EmitContext& ctx, Id lhs, Id rhs); | |||
| 306 | Id EmitINotEqual(EmitContext& ctx, Id lhs, Id rhs); | 306 | Id EmitINotEqual(EmitContext& ctx, Id lhs, Id rhs); |
| 307 | Id EmitSGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); | 307 | Id EmitSGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); |
| 308 | Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); | 308 | Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); |
| 309 | Id EmitSharedAtomicIAdd32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 310 | Id EmitSharedAtomicSMin32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 311 | Id EmitSharedAtomicUMin32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 312 | Id EmitSharedAtomicSMax32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 313 | Id EmitSharedAtomicUMax32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 314 | Id EmitSharedAtomicInc32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 315 | Id EmitSharedAtomicDec32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 316 | Id EmitSharedAtomicAnd32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 317 | Id EmitSharedAtomicOr32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 318 | Id EmitSharedAtomicXor32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 319 | Id EmitSharedAtomicExchange32(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 320 | Id EmitSharedAtomicExchange64(EmitContext& ctx, Id pointer_offset, Id value); | ||
| 321 | Id EmitStorageAtomicIAdd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 322 | Id value); | ||
| 323 | Id EmitStorageAtomicSMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 324 | Id value); | ||
| 325 | Id EmitStorageAtomicUMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 326 | Id value); | ||
| 327 | Id EmitStorageAtomicSMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 328 | Id value); | ||
| 329 | Id EmitStorageAtomicUMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 330 | Id value); | ||
| 331 | Id EmitStorageAtomicInc32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 332 | Id value); | ||
| 333 | Id EmitStorageAtomicDec32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 334 | Id value); | ||
| 335 | Id EmitStorageAtomicAnd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 336 | Id value); | ||
| 337 | Id EmitStorageAtomicOr32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 338 | Id value); | ||
| 339 | Id EmitStorageAtomicXor32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 340 | Id value); | ||
| 341 | Id EmitStorageAtomicExchange32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 342 | Id value); | ||
| 343 | Id EmitStorageAtomicIAdd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 344 | Id value); | ||
| 345 | Id EmitStorageAtomicSMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 346 | Id value); | ||
| 347 | Id EmitStorageAtomicUMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 348 | Id value); | ||
| 349 | Id EmitStorageAtomicSMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 350 | Id value); | ||
| 351 | Id EmitStorageAtomicUMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 352 | Id value); | ||
| 353 | Id EmitStorageAtomicAnd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 354 | Id value); | ||
| 355 | Id EmitStorageAtomicOr64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 356 | Id value); | ||
| 357 | Id EmitStorageAtomicXor64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 358 | Id value); | ||
| 359 | Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 360 | Id value); | ||
| 361 | Id EmitStorageAtomicAddF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 362 | Id value); | ||
| 363 | Id EmitStorageAtomicAddF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 364 | Id value); | ||
| 365 | Id EmitStorageAtomicAddF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 366 | Id value); | ||
| 367 | Id EmitStorageAtomicMinF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 368 | Id value); | ||
| 369 | Id EmitStorageAtomicMinF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 370 | Id value); | ||
| 371 | Id EmitStorageAtomicMaxF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 372 | Id value); | ||
| 373 | Id EmitStorageAtomicMaxF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset, | ||
| 374 | Id value); | ||
| 375 | Id EmitGlobalAtomicIAdd32(EmitContext& ctx); | ||
| 376 | Id EmitGlobalAtomicSMin32(EmitContext& ctx); | ||
| 377 | Id EmitGlobalAtomicUMin32(EmitContext& ctx); | ||
| 378 | Id EmitGlobalAtomicSMax32(EmitContext& ctx); | ||
| 379 | Id EmitGlobalAtomicUMax32(EmitContext& ctx); | ||
| 380 | Id EmitGlobalAtomicInc32(EmitContext& ctx); | ||
| 381 | Id EmitGlobalAtomicDec32(EmitContext& ctx); | ||
| 382 | Id EmitGlobalAtomicAnd32(EmitContext& ctx); | ||
| 383 | Id EmitGlobalAtomicOr32(EmitContext& ctx); | ||
| 384 | Id EmitGlobalAtomicXor32(EmitContext& ctx); | ||
| 385 | Id EmitGlobalAtomicExchange32(EmitContext& ctx); | ||
| 386 | Id EmitGlobalAtomicIAdd64(EmitContext& ctx); | ||
| 387 | Id EmitGlobalAtomicSMin64(EmitContext& ctx); | ||
| 388 | Id EmitGlobalAtomicUMin64(EmitContext& ctx); | ||
| 389 | Id EmitGlobalAtomicSMax64(EmitContext& ctx); | ||
| 390 | Id EmitGlobalAtomicUMax64(EmitContext& ctx); | ||
| 391 | Id EmitGlobalAtomicInc64(EmitContext& ctx); | ||
| 392 | Id EmitGlobalAtomicDec64(EmitContext& ctx); | ||
| 393 | Id EmitGlobalAtomicAnd64(EmitContext& ctx); | ||
| 394 | Id EmitGlobalAtomicOr64(EmitContext& ctx); | ||
| 395 | Id EmitGlobalAtomicXor64(EmitContext& ctx); | ||
| 396 | Id EmitGlobalAtomicExchange64(EmitContext& ctx); | ||
| 397 | Id EmitGlobalAtomicAddF32(EmitContext& ctx); | ||
| 398 | Id EmitGlobalAtomicAddF16x2(EmitContext& ctx); | ||
| 399 | Id EmitGlobalAtomicAddF32x2(EmitContext& ctx); | ||
| 400 | Id EmitGlobalAtomicMinF16x2(EmitContext& ctx); | ||
| 401 | Id EmitGlobalAtomicMinF32x2(EmitContext& ctx); | ||
| 402 | Id EmitGlobalAtomicMaxF16x2(EmitContext& ctx); | ||
| 403 | Id EmitGlobalAtomicMaxF32x2(EmitContext& ctx); | ||
| 309 | Id EmitLogicalOr(EmitContext& ctx, Id a, Id b); | 404 | Id EmitLogicalOr(EmitContext& ctx, Id a, Id b); |
| 310 | Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b); | 405 | Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b); |
| 311 | Id EmitLogicalXor(EmitContext& ctx, Id a, Id b); | 406 | Id EmitLogicalXor(EmitContext& ctx, Id a, Id b); |