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authorGravatar ameerj2021-05-22 02:32:57 -0400
committerGravatar ameerj2021-07-22 21:51:36 -0400
commit65c6f73e436ba3116030277a7a8bcb563f9554e2 (patch)
tree379f8ed7647aa543e54ef953cc39d761b85c192e /src/shader_recompiler/backend/glsl/reg_alloc.cpp
parentglsl: Add many FP32/64 instructions (diff)
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glsl: More FP instructions/fixes
Diffstat (limited to 'src/shader_recompiler/backend/glsl/reg_alloc.cpp')
-rw-r--r--src/shader_recompiler/backend/glsl/reg_alloc.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/shader_recompiler/backend/glsl/reg_alloc.cpp b/src/shader_recompiler/backend/glsl/reg_alloc.cpp
index 039236689..c370aabb5 100644
--- a/src/shader_recompiler/backend/glsl/reg_alloc.cpp
+++ b/src/shader_recompiler/backend/glsl/reg_alloc.cpp
@@ -30,11 +30,11 @@ std::string MakeImm(const IR::Value& value) {
30 case IR::Type::U1: 30 case IR::Type::U1:
31 return fmt::format("{}", value.U1() ? "true" : "false"); 31 return fmt::format("{}", value.U1() ? "true" : "false");
32 case IR::Type::U32: 32 case IR::Type::U32:
33 return fmt::format("{}", value.U32()); 33 return fmt::format("{}u", value.U32());
34 case IR::Type::F32: 34 case IR::Type::F32:
35 return fmt::format("{}", value.F32()); 35 return fmt::format("{}f", value.F32());
36 case IR::Type::U64: 36 case IR::Type::U64:
37 return fmt::format("{}", value.U64()); 37 return fmt::format("{}ul", value.U64());
38 case IR::Type::F64: 38 case IR::Type::F64:
39 return fmt::format("{}", value.F64()); 39 return fmt::format("{}", value.F64());
40 default: 40 default: