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| author | 2021-07-25 21:27:21 -0300 | |
|---|---|---|
| committer | 2021-11-16 22:11:28 +0100 | |
| commit | 95761cc6a70987b2625d68c4d9da4e2622f57808 (patch) | |
| tree | 6bb64646fe8a4bc2741d260526be61b8f954dce2 /src/shader_recompiler/backend/glasm | |
| parent | common/settings: Remove unused scaling options (diff) | |
| download | yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.tar.gz yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.tar.xz yuzu-95761cc6a70987b2625d68c4d9da4e2622f57808.zip | |
shader: Add integer division opcodes
Diffstat (limited to 'src/shader_recompiler/backend/glasm')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | 2 | ||||
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | 8 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h index cb7232704..4f8dd8e42 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h +++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |||
| @@ -304,6 +304,8 @@ void EmitIAdd64(EmitContext& ctx, IR::Inst& inst, Register a, Register b); | |||
| 304 | void EmitISub32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | 304 | void EmitISub32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); |
| 305 | void EmitISub64(EmitContext& ctx, IR::Inst& inst, Register a, Register b); | 305 | void EmitISub64(EmitContext& ctx, IR::Inst& inst, Register a, Register b); |
| 306 | void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | 306 | void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); |
| 307 | void EmitSDiv32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 308 | void EmitUDiv32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b); | ||
| 307 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | 309 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); |
| 308 | void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value); | 310 | void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value); |
| 309 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | 311 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); |
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp index f55c26b76..8aa494a4d 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | |||
| @@ -90,6 +90,14 @@ void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) { | |||
| 90 | ctx.Add("MUL.S {}.x,{},{};", inst, a, b); | 90 | ctx.Add("MUL.S {}.x,{},{};", inst, a, b); |
| 91 | } | 91 | } |
| 92 | 92 | ||
| 93 | void EmitSDiv32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) { | ||
| 94 | ctx.Add("DIV.S {}.x,{},{};", inst, a, b); | ||
| 95 | } | ||
| 96 | |||
| 97 | void EmitUDiv32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b) { | ||
| 98 | ctx.Add("DIV.U {}.x,{},{};", inst, a, b); | ||
| 99 | } | ||
| 100 | |||
| 93 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) { | 101 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) { |
| 94 | if (value.type != Type::Register && static_cast<s32>(value.imm_u32) < 0) { | 102 | if (value.type != Type::Register && static_cast<s32>(value.imm_u32) < 0) { |
| 95 | ctx.Add("MOV.S {},{};", inst, -static_cast<s32>(value.imm_u32)); | 103 | ctx.Add("MOV.S {},{};", inst, -static_cast<s32>(value.imm_u32)); |