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| author | 2023-01-25 22:03:15 -0500 | |
|---|---|---|
| committer | 2023-01-25 22:03:15 -0500 | |
| commit | 93cc6e4d992d60a7e8fe73d9ab062e1187775ec5 (patch) | |
| tree | 335599cbf3f86107b0ceca197237c041c33827f0 /src/shader_recompiler/backend/glasm | |
| parent | Merge pull request #9555 from abouvier/catch2-update (diff) | |
| download | yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.tar.gz yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.tar.xz yuzu-93cc6e4d992d60a7e8fe73d9ab062e1187775ec5.zip | |
shader_recompiler: Remove S32 IR type
The frontend IR opcodes do not distinguish between signed and unsigned integer types.
Fixes broken shaders when IR validation/graphics debugging is enabled for shaders that used BitCastS32F32
Diffstat (limited to 'src/shader_recompiler/backend/glasm')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp | 4 | ||||
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | 1 |
2 files changed, 0 insertions, 5 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp index 5bfdecc09..2fc2a0ac6 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp | |||
| @@ -43,10 +43,6 @@ void EmitBitCastU64F64(EmitContext&, IR::Inst& inst, const IR::Value& value) { | |||
| 43 | Alias(inst, value); | 43 | Alias(inst, value); |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | void EmitBitCastS32F32(EmitContext&, IR::Inst& inst, const IR::Value& value) { | ||
| 47 | Alias(inst, value); | ||
| 48 | } | ||
| 49 | |||
| 50 | void EmitBitCastF16U16(EmitContext&, IR::Inst& inst, const IR::Value& value) { | 46 | void EmitBitCastF16U16(EmitContext&, IR::Inst& inst, const IR::Value& value) { |
| 51 | Alias(inst, value); | 47 | Alias(inst, value); |
| 52 | } | 48 | } |
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h index eaaf9ba39..415a249e4 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h +++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |||
| @@ -197,7 +197,6 @@ void EmitSelectF64(EmitContext& ctx, ScalarS32 cond, Register true_value, Regist | |||
| 197 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 197 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 198 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 198 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 199 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 199 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 200 | void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 201 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 200 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 202 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 201 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |
| 203 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | 202 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); |