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| author |  ReinUsesLisp | 2021-05-18 04:04:06 -0300 |
|---|---|---|
| committer |  ameerj | 2021-07-22 21:51:32 -0400 |
| commit | 1ee7f8b943d1ab6ac6dec18bae6c2be3fd8d246c (patch) | |
| tree | 0967ae40a8bfc7f557e5a8c399bb9f18200d178a /src/shader_recompiler/backend/glasm/reg_alloc.cpp | |
| parent | shader: Read branch conditions from an instruction (diff) | |
| download | yuzu-1ee7f8b943d1ab6ac6dec18bae6c2be3fd8d246c.tar.gz yuzu-1ee7f8b943d1ab6ac6dec18bae6c2be3fd8d246c.tar.xz yuzu-1ee7f8b943d1ab6ac6dec18bae6c2be3fd8d246c.zip | |
glasm: Do not alias ConditionRef for now
Immediate condition refs where not handled correctly. Just move the
value for now.
Diffstat (limited to 'src/shader_recompiler/backend/glasm/reg_alloc.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/reg_alloc.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/shader_recompiler/backend/glasm/reg_alloc.cpp b/src/shader_recompiler/backend/glasm/reg_alloc.cpp index 1a88331b4..707b22247 100644 --- a/src/shader_recompiler/backend/glasm/reg_alloc.cpp +++ b/src/shader_recompiler/backend/glasm/reg_alloc.cpp | |||
| @@ -139,7 +139,6 @@ void RegAlloc::Free(Id id) { | |||
| 139 | /*static*/ bool RegAlloc::IsAliased(const IR::Inst& inst) { | 139 | /*static*/ bool RegAlloc::IsAliased(const IR::Inst& inst) { |
| 140 | switch (inst.GetOpcode()) { | 140 | switch (inst.GetOpcode()) { |
| 141 | case IR::Opcode::Identity: | 141 | case IR::Opcode::Identity: |
| 142 | case IR::Opcode::ConditionRef: | ||
| 143 | case IR::Opcode::BitCastU16F16: | 142 | case IR::Opcode::BitCastU16F16: |
| 144 | case IR::Opcode::BitCastU32F32: | 143 | case IR::Opcode::BitCastU32F32: |
| 145 | case IR::Opcode::BitCastU64F64: | 144 | case IR::Opcode::BitCastU64F64: |