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| author |  ReinUsesLisp | 2021-05-09 22:43:29 -0300 |
|---|---|---|
| committer |  ameerj | 2021-07-22 21:51:31 -0400 |
| commit | ad61b47f80b96436ef675abcf1123668d9c1180d (patch) | |
| tree | 555fb6be6058322eae22e7088e8fbc4a615f796d /src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | |
| parent | glasm: Add fp min/max insts and fix store for fp64 on GLASM (diff) | |
| download | yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.tar.gz yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.tar.xz yuzu-ad61b47f80b96436ef675abcf1123668d9c1180d.zip | |
glasm: Add conversion instructions to GLASM
Diffstat (limited to 'src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp index c9386805a..40f48a091 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_integer.cpp | |||
| @@ -141,14 +141,16 @@ void EmitUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b) { | |||
| 141 | 141 | ||
| 142 | void EmitSClamp32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value, ScalarS32 min, ScalarS32 max) { | 142 | void EmitSClamp32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value, ScalarS32 min, ScalarS32 max) { |
| 143 | const Register ret{ctx.reg_alloc.Define(inst)}; | 143 | const Register ret{ctx.reg_alloc.Define(inst)}; |
| 144 | ctx.Add("MIN.S {}.x,{},{};", ret, max, value); | 144 | ctx.Add("MIN.S {}.x,{},{};" |
| 145 | ctx.Add("MAX.S {}.x,{},{};", ret, ret, min); | 145 | "MAX.S {}.x,{},{};", |
| 146 | ret, max, value, ret, ret, min); | ||
| 146 | } | 147 | } |
| 147 | 148 | ||
| 148 | void EmitUClamp32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 min, ScalarU32 max) { | 149 | void EmitUClamp32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 min, ScalarU32 max) { |
| 149 | const Register ret{ctx.reg_alloc.Define(inst)}; | 150 | const Register ret{ctx.reg_alloc.Define(inst)}; |
| 150 | ctx.Add("MIN.U {}.x,{},{};", ret, max, value); | 151 | ctx.Add("MIN.U {}.x,{},{};" |
| 151 | ctx.Add("MAX.U {}.x,{},{};", ret, ret, min); | 152 | "MAX.U {}.x,{},{};", |
| 153 | ret, max, value, ret, ret, min); | ||
| 152 | } | 154 | } |
| 153 | 155 | ||
| 154 | void EmitSLessThan(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) { | 156 | void EmitSLessThan(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) { |