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| author | 2021-05-10 18:21:28 -0300 | |
|---|---|---|
| committer | 2021-07-22 21:51:31 -0400 | |
| commit | c4fd6b55bc9acd06b2fc89f84fd175d78e14110a (patch) | |
| tree | c246a1c64f4826faedcf5c93be778116e48caf85 /src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |
| parent | glasm: Add MUFU instructions to GLASM (diff) | |
| download | yuzu-c4fd6b55bc9acd06b2fc89f84fd175d78e14110a.tar.gz yuzu-c4fd6b55bc9acd06b2fc89f84fd175d78e14110a.tar.xz yuzu-c4fd6b55bc9acd06b2fc89f84fd175d78e14110a.zip | |
glasm: Implement shuffle and vote instructions on GLASM
Diffstat (limited to 'src/shader_recompiler/backend/glasm/emit_glasm_instructions.h')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h index 1bbd02022..75613571f 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h +++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |||
| @@ -584,24 +584,24 @@ void EmitImageAtomicXor32(EmitContext& ctx, IR::Inst& inst, const IR::Value& ind | |||
| 584 | ScalarU32 value); | 584 | ScalarU32 value); |
| 585 | void EmitImageAtomicExchange32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | 585 | void EmitImageAtomicExchange32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, |
| 586 | Register coords, ScalarU32 value); | 586 | Register coords, ScalarU32 value); |
| 587 | void EmitLaneId(EmitContext& ctx); | 587 | void EmitLaneId(EmitContext& ctx, IR::Inst& inst); |
| 588 | void EmitVoteAll(EmitContext& ctx, ScalarS32 pred); | 588 | void EmitVoteAll(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred); |
| 589 | void EmitVoteAny(EmitContext& ctx, ScalarS32 pred); | 589 | void EmitVoteAny(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred); |
| 590 | void EmitVoteEqual(EmitContext& ctx, ScalarS32 pred); | 590 | void EmitVoteEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred); |
| 591 | void EmitSubgroupBallot(EmitContext& ctx, ScalarS32 pred); | 591 | void EmitSubgroupBallot(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred); |
| 592 | void EmitSubgroupEqMask(EmitContext& ctx); | 592 | void EmitSubgroupEqMask(EmitContext& ctx, IR::Inst& inst); |
| 593 | void EmitSubgroupLtMask(EmitContext& ctx); | 593 | void EmitSubgroupLtMask(EmitContext& ctx, IR::Inst& inst); |
| 594 | void EmitSubgroupLeMask(EmitContext& ctx); | 594 | void EmitSubgroupLeMask(EmitContext& ctx, IR::Inst& inst); |
| 595 | void EmitSubgroupGtMask(EmitContext& ctx); | 595 | void EmitSubgroupGtMask(EmitContext& ctx, IR::Inst& inst); |
| 596 | void EmitSubgroupGeMask(EmitContext& ctx); | 596 | void EmitSubgroupGeMask(EmitContext& ctx, IR::Inst& inst); |
| 597 | void EmitShuffleIndex(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, | 597 | void EmitShuffleIndex(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, |
| 598 | ScalarU32 clamp, ScalarU32 segmentation_mask); | 598 | const IR::Value& clamp, const IR::Value& segmentation_mask); |
| 599 | void EmitShuffleUp(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, | 599 | void EmitShuffleUp(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, |
| 600 | ScalarU32 clamp, ScalarU32 segmentation_mask); | 600 | const IR::Value& clamp, const IR::Value& segmentation_mask); |
| 601 | void EmitShuffleDown(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, | 601 | void EmitShuffleDown(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, |
| 602 | ScalarU32 clamp, ScalarU32 segmentation_mask); | 602 | const IR::Value& clamp, const IR::Value& segmentation_mask); |
| 603 | void EmitShuffleButterfly(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, | 603 | void EmitShuffleButterfly(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, |
| 604 | ScalarU32 clamp, ScalarU32 segmentation_mask); | 604 | const IR::Value& clamp, const IR::Value& segmentation_mask); |
| 605 | void EmitFSwizzleAdd(EmitContext& ctx, ScalarF32 op_a, ScalarF32 op_b, ScalarU32 swizzle); | 605 | void EmitFSwizzleAdd(EmitContext& ctx, ScalarF32 op_a, ScalarF32 op_b, ScalarU32 swizzle); |
| 606 | void EmitDPdxFine(EmitContext& ctx, ScalarF32 op_a); | 606 | void EmitDPdxFine(EmitContext& ctx, ScalarF32 op_a); |
| 607 | void EmitDPdyFine(EmitContext& ctx, ScalarF32 op_a); | 607 | void EmitDPdyFine(EmitContext& ctx, ScalarF32 op_a); |