diff options
| author | 2021-07-25 11:39:04 -0700 | |
|---|---|---|
| committer | 2021-07-25 11:39:04 -0700 | |
| commit | 98b26b6e126d4775fdf3f773fe8a8ac808a8ff8f (patch) | |
| tree | 816faa96c2c4d291825063433331a8ea4b3d08f1 /src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |
| parent | Merge pull request #6699 from lat9nq/common-threads (diff) | |
| parent | shader: Support out of bound local memory reads and immediate writes (diff) | |
| download | yuzu-98b26b6e126d4775fdf3f773fe8a8ac808a8ff8f.tar.gz yuzu-98b26b6e126d4775fdf3f773fe8a8ac808a8ff8f.tar.xz yuzu-98b26b6e126d4775fdf3f773fe8a8ac808a8ff8f.zip | |
Merge pull request #6585 from ameerj/hades
Shader Decompiler Rewrite
Diffstat (limited to 'src/shader_recompiler/backend/glasm/emit_glasm_instructions.h')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | 625 |
1 files changed, 625 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h new file mode 100644 index 000000000..12afda43b --- /dev/null +++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |||
| @@ -0,0 +1,625 @@ | |||
| 1 | // Copyright 2021 yuzu Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #pragma once | ||
| 6 | |||
| 7 | #include "common/common_types.h" | ||
| 8 | #include "shader_recompiler/backend/glasm/reg_alloc.h" | ||
| 9 | |||
| 10 | namespace Shader::IR { | ||
| 11 | enum class Attribute : u64; | ||
| 12 | enum class Patch : u64; | ||
| 13 | class Inst; | ||
| 14 | class Value; | ||
| 15 | } // namespace Shader::IR | ||
| 16 | |||
| 17 | namespace Shader::Backend::GLASM { | ||
| 18 | |||
| 19 | class EmitContext; | ||
| 20 | |||
| 21 | // Microinstruction emitters | ||
| 22 | void EmitPhi(EmitContext& ctx, IR::Inst& inst); | ||
| 23 | void EmitVoid(EmitContext& ctx); | ||
| 24 | void EmitIdentity(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 25 | void EmitConditionRef(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 26 | void EmitReference(EmitContext&, const IR::Value& value); | ||
| 27 | void EmitPhiMove(EmitContext& ctx, const IR::Value& phi, const IR::Value& value); | ||
| 28 | void EmitJoin(EmitContext& ctx); | ||
| 29 | void EmitDemoteToHelperInvocation(EmitContext& ctx); | ||
| 30 | void EmitBarrier(EmitContext& ctx); | ||
| 31 | void EmitWorkgroupMemoryBarrier(EmitContext& ctx); | ||
| 32 | void EmitDeviceMemoryBarrier(EmitContext& ctx); | ||
| 33 | void EmitPrologue(EmitContext& ctx); | ||
| 34 | void EmitEpilogue(EmitContext& ctx); | ||
| 35 | void EmitEmitVertex(EmitContext& ctx, ScalarS32 stream); | ||
| 36 | void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream); | ||
| 37 | void EmitGetRegister(EmitContext& ctx); | ||
| 38 | void EmitSetRegister(EmitContext& ctx); | ||
| 39 | void EmitGetPred(EmitContext& ctx); | ||
| 40 | void EmitSetPred(EmitContext& ctx); | ||
| 41 | void EmitSetGotoVariable(EmitContext& ctx); | ||
| 42 | void EmitGetGotoVariable(EmitContext& ctx); | ||
| 43 | void EmitSetIndirectBranchVariable(EmitContext& ctx); | ||
| 44 | void EmitGetIndirectBranchVariable(EmitContext& ctx); | ||
| 45 | void EmitGetCbufU8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset); | ||
| 46 | void EmitGetCbufS8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset); | ||
| 47 | void EmitGetCbufU16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset); | ||
| 48 | void EmitGetCbufS16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset); | ||
| 49 | void EmitGetCbufU32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset); | ||
| 50 | void EmitGetCbufF32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset); | ||
| 51 | void EmitGetCbufU32x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset); | ||
| 52 | void EmitGetAttribute(EmitContext& ctx, IR::Inst& inst, IR::Attribute attr, ScalarU32 vertex); | ||
| 53 | void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, ScalarF32 value, ScalarU32 vertex); | ||
| 54 | void EmitGetAttributeIndexed(EmitContext& ctx, IR::Inst& inst, ScalarS32 offset, ScalarU32 vertex); | ||
| 55 | void EmitSetAttributeIndexed(EmitContext& ctx, ScalarU32 offset, ScalarF32 value, ScalarU32 vertex); | ||
| 56 | void EmitGetPatch(EmitContext& ctx, IR::Inst& inst, IR::Patch patch); | ||
| 57 | void EmitSetPatch(EmitContext& ctx, IR::Patch patch, ScalarF32 value); | ||
| 58 | void EmitSetFragColor(EmitContext& ctx, u32 index, u32 component, ScalarF32 value); | ||
| 59 | void EmitSetSampleMask(EmitContext& ctx, ScalarS32 value); | ||
| 60 | void EmitSetFragDepth(EmitContext& ctx, ScalarF32 value); | ||
| 61 | void EmitGetZFlag(EmitContext& ctx); | ||
| 62 | void EmitGetSFlag(EmitContext& ctx); | ||
| 63 | void EmitGetCFlag(EmitContext& ctx); | ||
| 64 | void EmitGetOFlag(EmitContext& ctx); | ||
| 65 | void EmitSetZFlag(EmitContext& ctx); | ||
| 66 | void EmitSetSFlag(EmitContext& ctx); | ||
| 67 | void EmitSetCFlag(EmitContext& ctx); | ||
| 68 | void EmitSetOFlag(EmitContext& ctx); | ||
| 69 | void EmitWorkgroupId(EmitContext& ctx, IR::Inst& inst); | ||
| 70 | void EmitLocalInvocationId(EmitContext& ctx, IR::Inst& inst); | ||
| 71 | void EmitInvocationId(EmitContext& ctx, IR::Inst& inst); | ||
| 72 | void EmitSampleId(EmitContext& ctx, IR::Inst& inst); | ||
| 73 | void EmitIsHelperInvocation(EmitContext& ctx, IR::Inst& inst); | ||
| 74 | void EmitYDirection(EmitContext& ctx, IR::Inst& inst); | ||
| 75 | void EmitLoadLocal(EmitContext& ctx, IR::Inst& inst, ScalarU32 word_offset); | ||
| 76 | void EmitWriteLocal(EmitContext& ctx, ScalarU32 word_offset, ScalarU32 value); | ||
| 77 | void EmitUndefU1(EmitContext& ctx, IR::Inst& inst); | ||
| 78 | void EmitUndefU8(EmitContext& ctx, IR::Inst& inst); | ||
| 79 | void EmitUndefU16(EmitContext& ctx, IR::Inst& inst); | ||
| 80 | void EmitUndefU32(EmitContext& ctx, IR::Inst& inst); | ||
| 81 | void EmitUndefU64(EmitContext& ctx, IR::Inst& inst); | ||
| 82 | void EmitLoadGlobalU8(EmitContext& ctx, IR::Inst& inst, Register address); | ||
| 83 | void EmitLoadGlobalS8(EmitContext& ctx, IR::Inst& inst, Register address); | ||
| 84 | void EmitLoadGlobalU16(EmitContext& ctx, IR::Inst& inst, Register address); | ||
| 85 | void EmitLoadGlobalS16(EmitContext& ctx, IR::Inst& inst, Register address); | ||
| 86 | void EmitLoadGlobal32(EmitContext& ctx, IR::Inst& inst, Register address); | ||
| 87 | void EmitLoadGlobal64(EmitContext& ctx, IR::Inst& inst, Register address); | ||
| 88 | void EmitLoadGlobal128(EmitContext& ctx, IR::Inst& inst, Register address); | ||
| 89 | void EmitWriteGlobalU8(EmitContext& ctx, Register address, Register value); | ||
| 90 | void EmitWriteGlobalS8(EmitContext& ctx, Register address, Register value); | ||
| 91 | void EmitWriteGlobalU16(EmitContext& ctx, Register address, Register value); | ||
| 92 | void EmitWriteGlobalS16(EmitContext& ctx, Register address, Register value); | ||
| 93 | void EmitWriteGlobal32(EmitContext& ctx, Register address, ScalarU32 value); | ||
| 94 | void EmitWriteGlobal64(EmitContext& ctx, Register address, Register value); | ||
| 95 | void EmitWriteGlobal128(EmitContext& ctx, Register address, Register value); | ||
| 96 | void EmitLoadStorageU8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 97 | ScalarU32 offset); | ||
| 98 | void EmitLoadStorageS8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 99 | ScalarU32 offset); | ||
| 100 | void EmitLoadStorageU16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 101 | ScalarU32 offset); | ||
| 102 | void EmitLoadStorageS16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 103 | ScalarU32 offset); | ||
| 104 | void EmitLoadStorage32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 105 | ScalarU32 offset); | ||
| 106 | void EmitLoadStorage64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 107 | ScalarU32 offset); | ||
| 108 | void EmitLoadStorage128(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 109 | ScalarU32 offset); | ||
| 110 | void EmitWriteStorageU8(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, | ||
| 111 | ScalarU32 value); | ||
| 112 | void EmitWriteStorageS8(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, | ||
| 113 | ScalarS32 value); | ||
| 114 | void EmitWriteStorageU16(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, | ||
| 115 | ScalarU32 value); | ||
| 116 | void EmitWriteStorageS16(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, | ||
| 117 | ScalarS32 value); | ||
| 118 | void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, | ||
| 119 | ScalarU32 value); | ||
| 120 | void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, | ||
| 121 | Register value); | ||
| 122 | void EmitWriteStorage128(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, | ||
| 123 | Register value); | ||
| 124 | void EmitLoadSharedU8(EmitContext& ctx, IR::Inst& inst, ScalarU32 offset); | ||
| 125 | void EmitLoadSharedS8(EmitContext& ctx, IR::Inst& inst, ScalarU32 offset); | ||
| 126 | void EmitLoadSharedU16(EmitContext& ctx, IR::Inst& inst, ScalarU32 offset); | ||
| 127 | void EmitLoadSharedS16(EmitContext& ctx, IR::Inst& inst, ScalarU32 offset); | ||
| 128 | void EmitLoadSharedU32(EmitContext& ctx, IR::Inst& inst, ScalarU32 offset); | ||
| 129 | void EmitLoadSharedU64(EmitContext& ctx, IR::Inst& inst, ScalarU32 offset); | ||
| 130 | void EmitLoadSharedU128(EmitContext& ctx, IR::Inst& inst, ScalarU32 offset); | ||
| 131 | void EmitWriteSharedU8(EmitContext& ctx, ScalarU32 offset, ScalarU32 value); | ||
| 132 | void EmitWriteSharedU16(EmitContext& ctx, ScalarU32 offset, ScalarU32 value); | ||
| 133 | void EmitWriteSharedU32(EmitContext& ctx, ScalarU32 offset, ScalarU32 value); | ||
| 134 | void EmitWriteSharedU64(EmitContext& ctx, ScalarU32 offset, Register value); | ||
| 135 | void EmitWriteSharedU128(EmitContext& ctx, ScalarU32 offset, Register value); | ||
| 136 | void EmitCompositeConstructU32x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& e1, | ||
| 137 | const IR::Value& e2); | ||
| 138 | void EmitCompositeConstructU32x3(EmitContext& ctx, IR::Inst& inst, const IR::Value& e1, | ||
| 139 | const IR::Value& e2, const IR::Value& e3); | ||
| 140 | void EmitCompositeConstructU32x4(EmitContext& ctx, IR::Inst& inst, const IR::Value& e1, | ||
| 141 | const IR::Value& e2, const IR::Value& e3, const IR::Value& e4); | ||
| 142 | void EmitCompositeExtractU32x2(EmitContext& ctx, IR::Inst& inst, Register composite, u32 index); | ||
| 143 | void EmitCompositeExtractU32x3(EmitContext& ctx, IR::Inst& inst, Register composite, u32 index); | ||
| 144 | void EmitCompositeExtractU32x4(EmitContext& ctx, IR::Inst& inst, Register composite, u32 index); | ||
| 145 | void EmitCompositeInsertU32x2(EmitContext& ctx, Register composite, ScalarU32 object, u32 index); | ||
| 146 | void EmitCompositeInsertU32x3(EmitContext& ctx, Register composite, ScalarU32 object, u32 index); | ||
| 147 | void EmitCompositeInsertU32x4(EmitContext& ctx, Register composite, ScalarU32 object, u32 index); | ||
| 148 | void EmitCompositeConstructF16x2(EmitContext& ctx, Register e1, Register e2); | ||
| 149 | void EmitCompositeConstructF16x3(EmitContext& ctx, Register e1, Register e2, Register e3); | ||
| 150 | void EmitCompositeConstructF16x4(EmitContext& ctx, Register e1, Register e2, Register e3, | ||
| 151 | Register e4); | ||
| 152 | void EmitCompositeExtractF16x2(EmitContext& ctx, Register composite, u32 index); | ||
| 153 | void EmitCompositeExtractF16x3(EmitContext& ctx, Register composite, u32 index); | ||
| 154 | void EmitCompositeExtractF16x4(EmitContext& ctx, Register composite, u32 index); | ||
| 155 | void EmitCompositeInsertF16x2(EmitContext& ctx, Register composite, Register object, u32 index); | ||
| 156 | void EmitCompositeInsertF16x3(EmitContext& ctx, Register composite, Register object, u32 index); | ||
| 157 | void EmitCompositeInsertF16x4(EmitContext& ctx, Register composite, Register object, u32 index); | ||
| 158 | void EmitCompositeConstructF32x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& e1, | ||
| 159 | const IR::Value& e2); | ||
| 160 | void EmitCompositeConstructF32x3(EmitContext& ctx, IR::Inst& inst, const IR::Value& e1, | ||
| 161 | const IR::Value& e2, const IR::Value& e3); | ||
| 162 | void EmitCompositeConstructF32x4(EmitContext& ctx, IR::Inst& inst, const IR::Value& e1, | ||
| 163 | const IR::Value& e2, const IR::Value& e3, const IR::Value& e4); | ||
| 164 | void EmitCompositeExtractF32x2(EmitContext& ctx, IR::Inst& inst, Register composite, u32 index); | ||
| 165 | void EmitCompositeExtractF32x3(EmitContext& ctx, IR::Inst& inst, Register composite, u32 index); | ||
| 166 | void EmitCompositeExtractF32x4(EmitContext& ctx, IR::Inst& inst, Register composite, u32 index); | ||
| 167 | void EmitCompositeInsertF32x2(EmitContext& ctx, IR::Inst& inst, Register composite, | ||
| 168 | ScalarF32 object, u32 index); | ||
| 169 | void EmitCompositeInsertF32x3(EmitContext& ctx, IR::Inst& inst, Register composite, | ||
| 170 | ScalarF32 object, u32 index); | ||
| 171 | void EmitCompositeInsertF32x4(EmitContext& ctx, IR::Inst& inst, Register composite, | ||
| 172 | ScalarF32 object, u32 index); | ||
| 173 | void EmitCompositeConstructF64x2(EmitContext& ctx); | ||
| 174 | void EmitCompositeConstructF64x3(EmitContext& ctx); | ||
| 175 | void EmitCompositeConstructF64x4(EmitContext& ctx); | ||
| 176 | void EmitCompositeExtractF64x2(EmitContext& ctx); | ||
| 177 | void EmitCompositeExtractF64x3(EmitContext& ctx); | ||
| 178 | void EmitCompositeExtractF64x4(EmitContext& ctx); | ||
| 179 | void EmitCompositeInsertF64x2(EmitContext& ctx, Register composite, Register object, u32 index); | ||
| 180 | void EmitCompositeInsertF64x3(EmitContext& ctx, Register composite, Register object, u32 index); | ||
| 181 | void EmitCompositeInsertF64x4(EmitContext& ctx, Register composite, Register object, u32 index); | ||
| 182 | void EmitSelectU1(EmitContext& ctx, IR::Inst& inst, ScalarS32 cond, ScalarS32 true_value, | ||
| 183 | ScalarS32 false_value); | ||
| 184 | void EmitSelectU8(EmitContext& ctx, ScalarS32 cond, ScalarS32 true_value, ScalarS32 false_value); | ||
| 185 | void EmitSelectU16(EmitContext& ctx, ScalarS32 cond, ScalarS32 true_value, ScalarS32 false_value); | ||
| 186 | void EmitSelectU32(EmitContext& ctx, IR::Inst& inst, ScalarS32 cond, ScalarS32 true_value, | ||
| 187 | ScalarS32 false_value); | ||
| 188 | void EmitSelectU64(EmitContext& ctx, IR::Inst& inst, ScalarS32 cond, Register true_value, | ||
| 189 | Register false_value); | ||
| 190 | void EmitSelectF16(EmitContext& ctx, ScalarS32 cond, Register true_value, Register false_value); | ||
| 191 | void EmitSelectF32(EmitContext& ctx, IR::Inst& inst, ScalarS32 cond, ScalarS32 true_value, | ||
| 192 | ScalarS32 false_value); | ||
| 193 | void EmitSelectF64(EmitContext& ctx, ScalarS32 cond, Register true_value, Register false_value); | ||
| 194 | void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 195 | void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 196 | void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 197 | void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 198 | void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 199 | void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value); | ||
| 200 | void EmitPackUint2x32(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 201 | void EmitUnpackUint2x32(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 202 | void EmitPackFloat2x16(EmitContext& ctx, Register value); | ||
| 203 | void EmitUnpackFloat2x16(EmitContext& ctx, Register value); | ||
| 204 | void EmitPackHalf2x16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 205 | void EmitUnpackHalf2x16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 206 | void EmitPackDouble2x32(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 207 | void EmitUnpackDouble2x32(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 208 | void EmitGetZeroFromOp(EmitContext& ctx); | ||
| 209 | void EmitGetSignFromOp(EmitContext& ctx); | ||
| 210 | void EmitGetCarryFromOp(EmitContext& ctx); | ||
| 211 | void EmitGetOverflowFromOp(EmitContext& ctx); | ||
| 212 | void EmitGetSparseFromOp(EmitContext& ctx); | ||
| 213 | void EmitGetInBoundsFromOp(EmitContext& ctx); | ||
| 214 | void EmitFPAbs16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 215 | void EmitFPAbs32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 216 | void EmitFPAbs64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 217 | void EmitFPAdd16(EmitContext& ctx, IR::Inst& inst, Register a, Register b); | ||
| 218 | void EmitFPAdd32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b); | ||
| 219 | void EmitFPAdd64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b); | ||
| 220 | void EmitFPFma16(EmitContext& ctx, IR::Inst& inst, Register a, Register b, Register c); | ||
| 221 | void EmitFPFma32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b, ScalarF32 c); | ||
| 222 | void EmitFPFma64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b, ScalarF64 c); | ||
| 223 | void EmitFPMax32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b); | ||
| 224 | void EmitFPMax64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b); | ||
| 225 | void EmitFPMin32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b); | ||
| 226 | void EmitFPMin64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b); | ||
| 227 | void EmitFPMul16(EmitContext& ctx, IR::Inst& inst, Register a, Register b); | ||
| 228 | void EmitFPMul32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b); | ||
| 229 | void EmitFPMul64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b); | ||
| 230 | void EmitFPNeg16(EmitContext& ctx, Register value); | ||
| 231 | void EmitFPNeg32(EmitContext& ctx, IR::Inst& inst, ScalarRegister value); | ||
| 232 | void EmitFPNeg64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 233 | void EmitFPSin(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 234 | void EmitFPCos(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 235 | void EmitFPExp2(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 236 | void EmitFPLog2(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 237 | void EmitFPRecip32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 238 | void EmitFPRecip64(EmitContext& ctx, Register value); | ||
| 239 | void EmitFPRecipSqrt32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 240 | void EmitFPRecipSqrt64(EmitContext& ctx, Register value); | ||
| 241 | void EmitFPSqrt(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 242 | void EmitFPSaturate16(EmitContext& ctx, Register value); | ||
| 243 | void EmitFPSaturate32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 244 | void EmitFPSaturate64(EmitContext& ctx, Register value); | ||
| 245 | void EmitFPClamp16(EmitContext& ctx, Register value, Register min_value, Register max_value); | ||
| 246 | void EmitFPClamp32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value, ScalarF32 min_value, | ||
| 247 | ScalarF32 max_value); | ||
| 248 | void EmitFPClamp64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value, ScalarF64 min_value, | ||
| 249 | ScalarF64 max_value); | ||
| 250 | void EmitFPRoundEven16(EmitContext& ctx, Register value); | ||
| 251 | void EmitFPRoundEven32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 252 | void EmitFPRoundEven64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 253 | void EmitFPFloor16(EmitContext& ctx, Register value); | ||
| 254 | void EmitFPFloor32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 255 | void EmitFPFloor64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 256 | void EmitFPCeil16(EmitContext& ctx, Register value); | ||
| 257 | void EmitFPCeil32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 258 | void EmitFPCeil64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 259 | void EmitFPTrunc16(EmitContext& ctx, Register value); | ||
| 260 | void EmitFPTrunc32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 261 | void EmitFPTrunc64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 262 | void EmitFPOrdEqual16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 263 | void EmitFPOrdEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 264 | void EmitFPOrdEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 265 | void EmitFPUnordEqual16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 266 | void EmitFPUnordEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 267 | void EmitFPUnordEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 268 | void EmitFPOrdNotEqual16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 269 | void EmitFPOrdNotEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 270 | void EmitFPOrdNotEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 271 | void EmitFPUnordNotEqual16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 272 | void EmitFPUnordNotEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 273 | void EmitFPUnordNotEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 274 | void EmitFPOrdLessThan16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 275 | void EmitFPOrdLessThan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 276 | void EmitFPOrdLessThan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 277 | void EmitFPUnordLessThan16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 278 | void EmitFPUnordLessThan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 279 | void EmitFPUnordLessThan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 280 | void EmitFPOrdGreaterThan16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 281 | void EmitFPOrdGreaterThan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 282 | void EmitFPOrdGreaterThan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 283 | void EmitFPUnordGreaterThan16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 284 | void EmitFPUnordGreaterThan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 285 | void EmitFPUnordGreaterThan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 286 | void EmitFPOrdLessThanEqual16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 287 | void EmitFPOrdLessThanEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 288 | void EmitFPOrdLessThanEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 289 | void EmitFPUnordLessThanEqual16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 290 | void EmitFPUnordLessThanEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 291 | void EmitFPUnordLessThanEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 292 | void EmitFPOrdGreaterThanEqual16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 293 | void EmitFPOrdGreaterThanEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 294 | void EmitFPOrdGreaterThanEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 295 | void EmitFPUnordGreaterThanEqual16(EmitContext& ctx, Register lhs, Register rhs); | ||
| 296 | void EmitFPUnordGreaterThanEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs); | ||
| 297 | void EmitFPUnordGreaterThanEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs); | ||
| 298 | void EmitFPIsNan16(EmitContext& ctx, Register value); | ||
| 299 | void EmitFPIsNan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 300 | void EmitFPIsNan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 301 | void EmitIAdd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 302 | void EmitIAdd64(EmitContext& ctx, IR::Inst& inst, Register a, Register b); | ||
| 303 | void EmitISub32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 304 | void EmitISub64(EmitContext& ctx, IR::Inst& inst, Register a, Register b); | ||
| 305 | void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 306 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 307 | void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 308 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 309 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); | ||
| 310 | void EmitShiftLeftLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base, ScalarU32 shift); | ||
| 311 | void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); | ||
| 312 | void EmitShiftRightLogical64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base, | ||
| 313 | ScalarU32 shift); | ||
| 314 | void EmitShiftRightArithmetic32(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 shift); | ||
| 315 | void EmitShiftRightArithmetic64(EmitContext& ctx, IR::Inst& inst, ScalarRegister base, | ||
| 316 | ScalarS32 shift); | ||
| 317 | void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 318 | void EmitBitwiseOr32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 319 | void EmitBitwiseXor32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 320 | void EmitBitFieldInsert(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 insert, | ||
| 321 | ScalarS32 offset, ScalarS32 count); | ||
| 322 | void EmitBitFieldSExtract(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 offset, | ||
| 323 | ScalarS32 count); | ||
| 324 | void EmitBitFieldUExtract(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 offset, | ||
| 325 | ScalarU32 count); | ||
| 326 | void EmitBitReverse32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 327 | void EmitBitCount32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 328 | void EmitBitwiseNot32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 329 | void EmitFindSMsb32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 330 | void EmitFindUMsb32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value); | ||
| 331 | void EmitSMin32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 332 | void EmitUMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b); | ||
| 333 | void EmitSMax32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 334 | void EmitUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b); | ||
| 335 | void EmitSClamp32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value, ScalarS32 min, ScalarS32 max); | ||
| 336 | void EmitUClamp32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 min, ScalarU32 max); | ||
| 337 | void EmitSLessThan(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs); | ||
| 338 | void EmitULessThan(EmitContext& ctx, IR::Inst& inst, ScalarU32 lhs, ScalarU32 rhs); | ||
| 339 | void EmitIEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs); | ||
| 340 | void EmitSLessThanEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs); | ||
| 341 | void EmitULessThanEqual(EmitContext& ctx, IR::Inst& inst, ScalarU32 lhs, ScalarU32 rhs); | ||
| 342 | void EmitSGreaterThan(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs); | ||
| 343 | void EmitUGreaterThan(EmitContext& ctx, IR::Inst& inst, ScalarU32 lhs, ScalarU32 rhs); | ||
| 344 | void EmitINotEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs); | ||
| 345 | void EmitSGreaterThanEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs); | ||
| 346 | void EmitUGreaterThanEqual(EmitContext& ctx, IR::Inst& inst, ScalarU32 lhs, ScalarU32 rhs); | ||
| 347 | void EmitSharedAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 348 | ScalarU32 value); | ||
| 349 | void EmitSharedAtomicSMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 350 | ScalarS32 value); | ||
| 351 | void EmitSharedAtomicUMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 352 | ScalarU32 value); | ||
| 353 | void EmitSharedAtomicSMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 354 | ScalarS32 value); | ||
| 355 | void EmitSharedAtomicUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 356 | ScalarU32 value); | ||
| 357 | void EmitSharedAtomicInc32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 358 | ScalarU32 value); | ||
| 359 | void EmitSharedAtomicDec32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 360 | ScalarU32 value); | ||
| 361 | void EmitSharedAtomicAnd32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 362 | ScalarU32 value); | ||
| 363 | void EmitSharedAtomicOr32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 364 | ScalarU32 value); | ||
| 365 | void EmitSharedAtomicXor32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 366 | ScalarU32 value); | ||
| 367 | void EmitSharedAtomicExchange32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 368 | ScalarU32 value); | ||
| 369 | void EmitSharedAtomicExchange64(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 370 | Register value); | ||
| 371 | void EmitStorageAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 372 | ScalarU32 offset, ScalarU32 value); | ||
| 373 | void EmitStorageAtomicSMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 374 | ScalarU32 offset, ScalarS32 value); | ||
| 375 | void EmitStorageAtomicUMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 376 | ScalarU32 offset, ScalarU32 value); | ||
| 377 | void EmitStorageAtomicSMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 378 | ScalarU32 offset, ScalarS32 value); | ||
| 379 | void EmitStorageAtomicUMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 380 | ScalarU32 offset, ScalarU32 value); | ||
| 381 | void EmitStorageAtomicInc32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 382 | ScalarU32 offset, ScalarU32 value); | ||
| 383 | void EmitStorageAtomicDec32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 384 | ScalarU32 offset, ScalarU32 value); | ||
| 385 | void EmitStorageAtomicAnd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 386 | ScalarU32 offset, ScalarU32 value); | ||
| 387 | void EmitStorageAtomicOr32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 388 | ScalarU32 offset, ScalarU32 value); | ||
| 389 | void EmitStorageAtomicXor32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 390 | ScalarU32 offset, ScalarU32 value); | ||
| 391 | void EmitStorageAtomicExchange32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 392 | ScalarU32 offset, ScalarU32 value); | ||
| 393 | void EmitStorageAtomicIAdd64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 394 | ScalarU32 offset, Register value); | ||
| 395 | void EmitStorageAtomicSMin64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 396 | ScalarU32 offset, Register value); | ||
| 397 | void EmitStorageAtomicUMin64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 398 | ScalarU32 offset, Register value); | ||
| 399 | void EmitStorageAtomicSMax64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 400 | ScalarU32 offset, Register value); | ||
| 401 | void EmitStorageAtomicUMax64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 402 | ScalarU32 offset, Register value); | ||
| 403 | void EmitStorageAtomicAnd64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 404 | ScalarU32 offset, Register value); | ||
| 405 | void EmitStorageAtomicOr64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 406 | ScalarU32 offset, Register value); | ||
| 407 | void EmitStorageAtomicXor64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 408 | ScalarU32 offset, Register value); | ||
| 409 | void EmitStorageAtomicExchange64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 410 | ScalarU32 offset, Register value); | ||
| 411 | void EmitStorageAtomicAddF32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 412 | ScalarU32 offset, ScalarF32 value); | ||
| 413 | void EmitStorageAtomicAddF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 414 | ScalarU32 offset, Register value); | ||
| 415 | void EmitStorageAtomicAddF32x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 416 | ScalarU32 offset, Register value); | ||
| 417 | void EmitStorageAtomicMinF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 418 | ScalarU32 offset, Register value); | ||
| 419 | void EmitStorageAtomicMinF32x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 420 | ScalarU32 offset, Register value); | ||
| 421 | void EmitStorageAtomicMaxF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 422 | ScalarU32 offset, Register value); | ||
| 423 | void EmitStorageAtomicMaxF32x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | ||
| 424 | ScalarU32 offset, Register value); | ||
| 425 | void EmitGlobalAtomicIAdd32(EmitContext& ctx); | ||
| 426 | void EmitGlobalAtomicSMin32(EmitContext& ctx); | ||
| 427 | void EmitGlobalAtomicUMin32(EmitContext& ctx); | ||
| 428 | void EmitGlobalAtomicSMax32(EmitContext& ctx); | ||
| 429 | void EmitGlobalAtomicUMax32(EmitContext& ctx); | ||
| 430 | void EmitGlobalAtomicInc32(EmitContext& ctx); | ||
| 431 | void EmitGlobalAtomicDec32(EmitContext& ctx); | ||
| 432 | void EmitGlobalAtomicAnd32(EmitContext& ctx); | ||
| 433 | void EmitGlobalAtomicOr32(EmitContext& ctx); | ||
| 434 | void EmitGlobalAtomicXor32(EmitContext& ctx); | ||
| 435 | void EmitGlobalAtomicExchange32(EmitContext& ctx); | ||
| 436 | void EmitGlobalAtomicIAdd64(EmitContext& ctx); | ||
| 437 | void EmitGlobalAtomicSMin64(EmitContext& ctx); | ||
| 438 | void EmitGlobalAtomicUMin64(EmitContext& ctx); | ||
| 439 | void EmitGlobalAtomicSMax64(EmitContext& ctx); | ||
| 440 | void EmitGlobalAtomicUMax64(EmitContext& ctx); | ||
| 441 | void EmitGlobalAtomicInc64(EmitContext& ctx); | ||
| 442 | void EmitGlobalAtomicDec64(EmitContext& ctx); | ||
| 443 | void EmitGlobalAtomicAnd64(EmitContext& ctx); | ||
| 444 | void EmitGlobalAtomicOr64(EmitContext& ctx); | ||
| 445 | void EmitGlobalAtomicXor64(EmitContext& ctx); | ||
| 446 | void EmitGlobalAtomicExchange64(EmitContext& ctx); | ||
| 447 | void EmitGlobalAtomicAddF32(EmitContext& ctx); | ||
| 448 | void EmitGlobalAtomicAddF16x2(EmitContext& ctx); | ||
| 449 | void EmitGlobalAtomicAddF32x2(EmitContext& ctx); | ||
| 450 | void EmitGlobalAtomicMinF16x2(EmitContext& ctx); | ||
| 451 | void EmitGlobalAtomicMinF32x2(EmitContext& ctx); | ||
| 452 | void EmitGlobalAtomicMaxF16x2(EmitContext& ctx); | ||
| 453 | void EmitGlobalAtomicMaxF32x2(EmitContext& ctx); | ||
| 454 | void EmitLogicalOr(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 455 | void EmitLogicalAnd(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 456 | void EmitLogicalXor(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | ||
| 457 | void EmitLogicalNot(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 458 | void EmitConvertS16F16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 459 | void EmitConvertS16F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 460 | void EmitConvertS16F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 461 | void EmitConvertS32F16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 462 | void EmitConvertS32F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 463 | void EmitConvertS32F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 464 | void EmitConvertS64F16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 465 | void EmitConvertS64F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 466 | void EmitConvertS64F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 467 | void EmitConvertU16F16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 468 | void EmitConvertU16F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 469 | void EmitConvertU16F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 470 | void EmitConvertU32F16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 471 | void EmitConvertU32F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 472 | void EmitConvertU32F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 473 | void EmitConvertU64F16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 474 | void EmitConvertU64F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 475 | void EmitConvertU64F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 476 | void EmitConvertU64U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value); | ||
| 477 | void EmitConvertU32U64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 478 | void EmitConvertF16F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 479 | void EmitConvertF32F16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 480 | void EmitConvertF32F64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value); | ||
| 481 | void EmitConvertF64F32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value); | ||
| 482 | void EmitConvertF16S8(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 483 | void EmitConvertF16S16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 484 | void EmitConvertF16S32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 485 | void EmitConvertF16S64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 486 | void EmitConvertF16U8(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 487 | void EmitConvertF16U16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 488 | void EmitConvertF16U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value); | ||
| 489 | void EmitConvertF16U64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 490 | void EmitConvertF32S8(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 491 | void EmitConvertF32S16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 492 | void EmitConvertF32S32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 493 | void EmitConvertF32S64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 494 | void EmitConvertF32U8(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 495 | void EmitConvertF32U16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 496 | void EmitConvertF32U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value); | ||
| 497 | void EmitConvertF32U64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 498 | void EmitConvertF64S8(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 499 | void EmitConvertF64S16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 500 | void EmitConvertF64S32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | ||
| 501 | void EmitConvertF64S64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 502 | void EmitConvertF64U8(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 503 | void EmitConvertF64U16(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 504 | void EmitConvertF64U32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value); | ||
| 505 | void EmitConvertF64U64(EmitContext& ctx, IR::Inst& inst, Register value); | ||
| 506 | void EmitBindlessImageSampleImplicitLod(EmitContext&); | ||
| 507 | void EmitBindlessImageSampleExplicitLod(EmitContext&); | ||
| 508 | void EmitBindlessImageSampleDrefImplicitLod(EmitContext&); | ||
| 509 | void EmitBindlessImageSampleDrefExplicitLod(EmitContext&); | ||
| 510 | void EmitBindlessImageGather(EmitContext&); | ||
| 511 | void EmitBindlessImageGatherDref(EmitContext&); | ||
| 512 | void EmitBindlessImageFetch(EmitContext&); | ||
| 513 | void EmitBindlessImageQueryDimensions(EmitContext&); | ||
| 514 | void EmitBindlessImageQueryLod(EmitContext&); | ||
| 515 | void EmitBindlessImageGradient(EmitContext&); | ||
| 516 | void EmitBindlessImageRead(EmitContext&); | ||
| 517 | void EmitBindlessImageWrite(EmitContext&); | ||
| 518 | void EmitBoundImageSampleImplicitLod(EmitContext&); | ||
| 519 | void EmitBoundImageSampleExplicitLod(EmitContext&); | ||
| 520 | void EmitBoundImageSampleDrefImplicitLod(EmitContext&); | ||
| 521 | void EmitBoundImageSampleDrefExplicitLod(EmitContext&); | ||
| 522 | void EmitBoundImageGather(EmitContext&); | ||
| 523 | void EmitBoundImageGatherDref(EmitContext&); | ||
| 524 | void EmitBoundImageFetch(EmitContext&); | ||
| 525 | void EmitBoundImageQueryDimensions(EmitContext&); | ||
| 526 | void EmitBoundImageQueryLod(EmitContext&); | ||
| 527 | void EmitBoundImageGradient(EmitContext&); | ||
| 528 | void EmitBoundImageRead(EmitContext&); | ||
| 529 | void EmitBoundImageWrite(EmitContext&); | ||
| 530 | void EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 531 | const IR::Value& coord, Register bias_lc, const IR::Value& offset); | ||
| 532 | void EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 533 | const IR::Value& coord, ScalarF32 lod, const IR::Value& offset); | ||
| 534 | void EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 535 | const IR::Value& coord, const IR::Value& dref, | ||
| 536 | const IR::Value& bias_lc, const IR::Value& offset); | ||
| 537 | void EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 538 | const IR::Value& coord, const IR::Value& dref, | ||
| 539 | const IR::Value& lod, const IR::Value& offset); | ||
| 540 | void EmitImageGather(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 541 | const IR::Value& coord, const IR::Value& offset, const IR::Value& offset2); | ||
| 542 | void EmitImageGatherDref(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 543 | const IR::Value& coord, const IR::Value& offset, const IR::Value& offset2, | ||
| 544 | const IR::Value& dref); | ||
| 545 | void EmitImageFetch(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 546 | const IR::Value& coord, const IR::Value& offset, ScalarS32 lod, ScalarS32 ms); | ||
| 547 | void EmitImageQueryDimensions(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 548 | ScalarS32 lod); | ||
| 549 | void EmitImageQueryLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord); | ||
| 550 | void EmitImageGradient(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 551 | const IR::Value& coord, const IR::Value& derivatives, | ||
| 552 | const IR::Value& offset, const IR::Value& lod_clamp); | ||
| 553 | void EmitImageRead(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord); | ||
| 554 | void EmitImageWrite(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 555 | Register color); | ||
| 556 | void EmitBindlessImageAtomicIAdd32(EmitContext&); | ||
| 557 | void EmitBindlessImageAtomicSMin32(EmitContext&); | ||
| 558 | void EmitBindlessImageAtomicUMin32(EmitContext&); | ||
| 559 | void EmitBindlessImageAtomicSMax32(EmitContext&); | ||
| 560 | void EmitBindlessImageAtomicUMax32(EmitContext&); | ||
| 561 | void EmitBindlessImageAtomicInc32(EmitContext&); | ||
| 562 | void EmitBindlessImageAtomicDec32(EmitContext&); | ||
| 563 | void EmitBindlessImageAtomicAnd32(EmitContext&); | ||
| 564 | void EmitBindlessImageAtomicOr32(EmitContext&); | ||
| 565 | void EmitBindlessImageAtomicXor32(EmitContext&); | ||
| 566 | void EmitBindlessImageAtomicExchange32(EmitContext&); | ||
| 567 | void EmitBoundImageAtomicIAdd32(EmitContext&); | ||
| 568 | void EmitBoundImageAtomicSMin32(EmitContext&); | ||
| 569 | void EmitBoundImageAtomicUMin32(EmitContext&); | ||
| 570 | void EmitBoundImageAtomicSMax32(EmitContext&); | ||
| 571 | void EmitBoundImageAtomicUMax32(EmitContext&); | ||
| 572 | void EmitBoundImageAtomicInc32(EmitContext&); | ||
| 573 | void EmitBoundImageAtomicDec32(EmitContext&); | ||
| 574 | void EmitBoundImageAtomicAnd32(EmitContext&); | ||
| 575 | void EmitBoundImageAtomicOr32(EmitContext&); | ||
| 576 | void EmitBoundImageAtomicXor32(EmitContext&); | ||
| 577 | void EmitBoundImageAtomicExchange32(EmitContext&); | ||
| 578 | void EmitImageAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 579 | ScalarU32 value); | ||
| 580 | void EmitImageAtomicSMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 581 | ScalarS32 value); | ||
| 582 | void EmitImageAtomicUMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 583 | ScalarU32 value); | ||
| 584 | void EmitImageAtomicSMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 585 | ScalarS32 value); | ||
| 586 | void EmitImageAtomicUMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 587 | ScalarU32 value); | ||
| 588 | void EmitImageAtomicInc32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 589 | ScalarU32 value); | ||
| 590 | void EmitImageAtomicDec32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 591 | ScalarU32 value); | ||
| 592 | void EmitImageAtomicAnd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 593 | ScalarU32 value); | ||
| 594 | void EmitImageAtomicOr32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 595 | ScalarU32 value); | ||
| 596 | void EmitImageAtomicXor32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, Register coord, | ||
| 597 | ScalarU32 value); | ||
| 598 | void EmitImageAtomicExchange32(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, | ||
| 599 | Register coord, ScalarU32 value); | ||
| 600 | void EmitLaneId(EmitContext& ctx, IR::Inst& inst); | ||
| 601 | void EmitVoteAll(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred); | ||
| 602 | void EmitVoteAny(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred); | ||
| 603 | void EmitVoteEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred); | ||
| 604 | void EmitSubgroupBallot(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred); | ||
| 605 | void EmitSubgroupEqMask(EmitContext& ctx, IR::Inst& inst); | ||
| 606 | void EmitSubgroupLtMask(EmitContext& ctx, IR::Inst& inst); | ||
| 607 | void EmitSubgroupLeMask(EmitContext& ctx, IR::Inst& inst); | ||
| 608 | void EmitSubgroupGtMask(EmitContext& ctx, IR::Inst& inst); | ||
| 609 | void EmitSubgroupGeMask(EmitContext& ctx, IR::Inst& inst); | ||
| 610 | void EmitShuffleIndex(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, | ||
| 611 | const IR::Value& clamp, const IR::Value& segmentation_mask); | ||
| 612 | void EmitShuffleUp(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, | ||
| 613 | const IR::Value& clamp, const IR::Value& segmentation_mask); | ||
| 614 | void EmitShuffleDown(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, | ||
| 615 | const IR::Value& clamp, const IR::Value& segmentation_mask); | ||
| 616 | void EmitShuffleButterfly(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index, | ||
| 617 | const IR::Value& clamp, const IR::Value& segmentation_mask); | ||
| 618 | void EmitFSwizzleAdd(EmitContext& ctx, IR::Inst& inst, ScalarF32 op_a, ScalarF32 op_b, | ||
| 619 | ScalarU32 swizzle); | ||
| 620 | void EmitDPdxFine(EmitContext& ctx, IR::Inst& inst, ScalarF32 op_a); | ||
| 621 | void EmitDPdyFine(EmitContext& ctx, IR::Inst& inst, ScalarF32 op_a); | ||
| 622 | void EmitDPdxCoarse(EmitContext& ctx, IR::Inst& inst, ScalarF32 op_a); | ||
| 623 | void EmitDPdyCoarse(EmitContext& ctx, IR::Inst& inst, ScalarF32 op_a); | ||
| 624 | |||
| 625 | } // namespace Shader::Backend::GLASM | ||