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| author |  ReinUsesLisp | 2021-05-10 03:55:33 -0300 |
|---|---|---|
| committer |  ameerj | 2021-07-22 21:51:31 -0400 |
| commit | 5b18a12df2116fcbb4bf10a2becd6cb404af0968 (patch) | |
| tree | 1568ddb378759cbf0b0176aa3ecedac1c0b15436 /src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |
| parent | shader: Add floating-point rounding to I2F (diff) | |
| download | yuzu-5b18a12df2116fcbb4bf10a2becd6cb404af0968.tar.gz yuzu-5b18a12df2116fcbb4bf10a2becd6cb404af0968.tar.xz yuzu-5b18a12df2116fcbb4bf10a2becd6cb404af0968.zip | |
glasm: Implement IAbs64 and INeg64 on GLASM
Diffstat (limited to 'src/shader_recompiler/backend/glasm/emit_glasm_instructions.h')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h index 52420c3c9..d65a474f2 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h +++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h | |||
| @@ -306,9 +306,9 @@ void EmitISub32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | |||
| 306 | void EmitISub64(EmitContext& ctx, Register a, Register b); | 306 | void EmitISub64(EmitContext& ctx, Register a, Register b); |
| 307 | void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); | 307 | void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b); |
| 308 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | 308 | void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); |
| 309 | void EmitINeg64(EmitContext& ctx, Register value); | 309 | void EmitINeg64(EmitContext& ctx, IR::Inst& inst, Register value); |
| 310 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); | 310 | void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value); |
| 311 | void EmitIAbs64(EmitContext& ctx, Register value); | 311 | void EmitIAbs64(EmitContext& ctx, IR::Inst& inst, Register value); |
| 312 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); | 312 | void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); |
| 313 | void EmitShiftLeftLogical64(EmitContext& ctx, Register base, Register shift); | 313 | void EmitShiftLeftLogical64(EmitContext& ctx, Register base, Register shift); |
| 314 | void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); | 314 | void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift); |