diff options
| author | 2021-05-10 22:35:16 -0400 | |
|---|---|---|
| committer | 2021-07-22 21:51:31 -0400 | |
| commit | 7ff5851608031baca2adceb9f72e7c75eda9b3a9 (patch) | |
| tree | 79951738906a2c2a76bf1a3354d52234f03285db /src/shader_recompiler/backend/glasm/emit_glasm_atomic.cpp | |
| parent | glasm: Ensure reg alloc order across compilers on GLASM (diff) | |
| download | yuzu-7ff5851608031baca2adceb9f72e7c75eda9b3a9.tar.gz yuzu-7ff5851608031baca2adceb9f72e7c75eda9b3a9.tar.xz yuzu-7ff5851608031baca2adceb9f72e7c75eda9b3a9.zip | |
glasm: Implement Storage atomics
StorageAtomicExchangeU64 is failing test seemingly due to failure storing 64-bit
result into the register
Diffstat (limited to 'src/shader_recompiler/backend/glasm/emit_glasm_atomic.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/glasm/emit_glasm_atomic.cpp | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_atomic.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_atomic.cpp index fe44c3d15..e72b252a3 100644 --- a/src/shader_recompiler/backend/glasm/emit_glasm_atomic.cpp +++ b/src/shader_recompiler/backend/glasm/emit_glasm_atomic.cpp | |||
| @@ -35,6 +35,66 @@ void Atom(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 | |||
| 35 | } | 35 | } |
| 36 | } // namespace | 36 | } // namespace |
| 37 | 37 | ||
| 38 | void EmitSharedAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 39 | ScalarU32 value) { | ||
| 40 | ctx.Add("ATOMS.ADD.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 41 | } | ||
| 42 | |||
| 43 | void EmitSharedAtomicSMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 44 | ScalarS32 value) { | ||
| 45 | ctx.Add("ATOMS.MIN.S32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 46 | } | ||
| 47 | |||
| 48 | void EmitSharedAtomicUMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 49 | ScalarU32 value) { | ||
| 50 | ctx.Add("ATOMS.MIN.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 51 | } | ||
| 52 | |||
| 53 | void EmitSharedAtomicSMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 54 | ScalarS32 value) { | ||
| 55 | ctx.Add("ATOMS.MAX.S32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 56 | } | ||
| 57 | |||
| 58 | void EmitSharedAtomicUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 59 | ScalarU32 value) { | ||
| 60 | ctx.Add("ATOMS.MAX.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 61 | } | ||
| 62 | |||
| 63 | void EmitSharedAtomicInc32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 64 | ScalarU32 value) { | ||
| 65 | ctx.Add("ATOMS.IWRAP.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 66 | } | ||
| 67 | |||
| 68 | void EmitSharedAtomicDec32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 69 | ScalarU32 value) { | ||
| 70 | ctx.Add("ATOMS.DWRAP.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 71 | } | ||
| 72 | |||
| 73 | void EmitSharedAtomicAnd32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 74 | ScalarU32 value) { | ||
| 75 | ctx.Add("ATOMS.AND.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 76 | } | ||
| 77 | |||
| 78 | void EmitSharedAtomicOr32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 79 | ScalarU32 value) { | ||
| 80 | ctx.Add("ATOMS.OR.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 81 | } | ||
| 82 | |||
| 83 | void EmitSharedAtomicXor32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 84 | ScalarU32 value) { | ||
| 85 | ctx.Add("ATOMS.XOR.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 86 | } | ||
| 87 | |||
| 88 | void EmitSharedAtomicExchange32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 89 | ScalarU32 value) { | ||
| 90 | ctx.Add("ATOMS.EXCH.U32 {},{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 91 | } | ||
| 92 | |||
| 93 | void EmitSharedAtomicExchange64(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset, | ||
| 94 | Register value) { | ||
| 95 | ctx.LongAdd("ATOMS.EXCH.U64 {}.x,{},shared_mem[{}];", inst, value, pointer_offset); | ||
| 96 | } | ||
| 97 | |||
| 38 | void EmitStorageAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, | 98 | void EmitStorageAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, |
| 39 | ScalarU32 offset, ScalarU32 value) { | 99 | ScalarU32 offset, ScalarU32 value) { |
| 40 | Atom(ctx, inst, binding, offset, value, "ADD", "U32"); | 100 | Atom(ctx, inst, binding, offset, value, "ADD", "U32"); |