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authorGravatar Lioncash2015-01-23 13:35:08 -0500
committerGravatar Lioncash2015-01-23 13:35:08 -0500
commite09fb7becc7639cb1561d7b3a062c6b32e9c52bb (patch)
tree1c68de90505cbfb8ca28e2bead11b03516b4ab6e /src/core
parentMerge pull request #502 from archshift/patch-1 (diff)
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vfp: Clean up vertical alignment for instructions
Diffstat (limited to 'src/core')
-rw-r--r--src/core/arm/skyeye_common/vfp/vfpinstr.cpp256
1 files changed, 125 insertions, 131 deletions
diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
index 2c1218c30..e06bfd87c 100644
--- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
@@ -26,9 +26,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index)
26 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmla_inst)); 26 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmla_inst));
27 vmla_inst *inst_cream = (vmla_inst *)inst_base->component; 27 vmla_inst *inst_cream = (vmla_inst *)inst_base->component;
28 28
29 inst_base->cond = BITS(inst, 28, 31); 29 inst_base->cond = BITS(inst, 28, 31);
30 inst_base->idx = index; 30 inst_base->idx = index;
31 inst_base->br = NON_BRANCH; 31 inst_base->br = NON_BRANCH;
32 inst_base->load_r15 = 0; 32 inst_base->load_r15 = 0;
33 33
34 inst_cream->dp_operation = BIT(inst, 8); 34 inst_cream->dp_operation = BIT(inst, 8);
@@ -149,9 +149,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index)
149 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmls_inst)); 149 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmls_inst));
150 vmls_inst *inst_cream = (vmls_inst *)inst_base->component; 150 vmls_inst *inst_cream = (vmls_inst *)inst_base->component;
151 151
152 inst_base->cond = BITS(inst, 28, 31); 152 inst_base->cond = BITS(inst, 28, 31);
153 inst_base->idx = index; 153 inst_base->idx = index;
154 inst_base->br = NON_BRANCH; 154 inst_base->br = NON_BRANCH;
155 inst_base->load_r15 = 0; 155 inst_base->load_r15 = 0;
156 156
157 inst_cream->dp_operation = BIT(inst, 8); 157 inst_cream->dp_operation = BIT(inst, 8);
@@ -272,9 +272,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index)
272 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmla_inst)); 272 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmla_inst));
273 vnmla_inst *inst_cream = (vnmla_inst *)inst_base->component; 273 vnmla_inst *inst_cream = (vnmla_inst *)inst_base->component;
274 274
275 inst_base->cond = BITS(inst, 28, 31); 275 inst_base->cond = BITS(inst, 28, 31);
276 inst_base->idx = index; 276 inst_base->idx = index;
277 inst_base->br = NON_BRANCH; 277 inst_base->br = NON_BRANCH;
278 inst_base->load_r15 = 0; 278 inst_base->load_r15 = 0;
279 279
280 inst_cream->dp_operation = BIT(inst, 8); 280 inst_cream->dp_operation = BIT(inst, 8);
@@ -397,9 +397,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index)
397 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmls_inst)); 397 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmls_inst));
398 vnmls_inst *inst_cream = (vnmls_inst *)inst_base->component; 398 vnmls_inst *inst_cream = (vnmls_inst *)inst_base->component;
399 399
400 inst_base->cond = BITS(inst, 28, 31); 400 inst_base->cond = BITS(inst, 28, 31);
401 inst_base->idx = index; 401 inst_base->idx = index;
402 inst_base->br = NON_BRANCH; 402 inst_base->br = NON_BRANCH;
403 inst_base->load_r15 = 0; 403 inst_base->load_r15 = 0;
404 404
405 inst_cream->dp_operation = BIT(inst, 8); 405 inst_cream->dp_operation = BIT(inst, 8);
@@ -520,9 +520,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index)
520 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmul_inst)); 520 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmul_inst));
521 vnmul_inst *inst_cream = (vnmul_inst *)inst_base->component; 521 vnmul_inst *inst_cream = (vnmul_inst *)inst_base->component;
522 522
523 inst_base->cond = BITS(inst, 28, 31); 523 inst_base->cond = BITS(inst, 28, 31);
524 inst_base->idx = index; 524 inst_base->idx = index;
525 inst_base->br = NON_BRANCH; 525 inst_base->br = NON_BRANCH;
526 inst_base->load_r15 = 0; 526 inst_base->load_r15 = 0;
527 527
528 inst_cream->dp_operation = BIT(inst, 8); 528 inst_cream->dp_operation = BIT(inst, 8);
@@ -634,9 +634,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index)
634 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmul_inst)); 634 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmul_inst));
635 vmul_inst *inst_cream = (vmul_inst *)inst_base->component; 635 vmul_inst *inst_cream = (vmul_inst *)inst_base->component;
636 636
637 inst_base->cond = BITS(inst, 28, 31); 637 inst_base->cond = BITS(inst, 28, 31);
638 inst_base->idx = index; 638 inst_base->idx = index;
639 inst_base->br = NON_BRANCH; 639 inst_base->br = NON_BRANCH;
640 inst_base->load_r15 = 0; 640 inst_base->load_r15 = 0;
641 641
642 inst_cream->dp_operation = BIT(inst, 8); 642 inst_cream->dp_operation = BIT(inst, 8);
@@ -761,9 +761,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index)
761 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vadd_inst)); 761 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vadd_inst));
762 vadd_inst *inst_cream = (vadd_inst *)inst_base->component; 762 vadd_inst *inst_cream = (vadd_inst *)inst_base->component;
763 763
764 inst_base->cond = BITS(inst, 28, 31); 764 inst_base->cond = BITS(inst, 28, 31);
765 inst_base->idx = index; 765 inst_base->idx = index;
766 inst_base->br = NON_BRANCH; 766 inst_base->br = NON_BRANCH;
767 inst_base->load_r15 = 0; 767 inst_base->load_r15 = 0;
768 768
769 inst_cream->dp_operation = BIT(inst, 8); 769 inst_cream->dp_operation = BIT(inst, 8);
@@ -882,9 +882,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index)
882 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsub_inst)); 882 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsub_inst));
883 vsub_inst *inst_cream = (vsub_inst *)inst_base->component; 883 vsub_inst *inst_cream = (vsub_inst *)inst_base->component;
884 884
885 inst_base->cond = BITS(inst, 28, 31); 885 inst_base->cond = BITS(inst, 28, 31);
886 inst_base->idx = index; 886 inst_base->idx = index;
887 inst_base->br = NON_BRANCH; 887 inst_base->br = NON_BRANCH;
888 inst_base->load_r15 = 0; 888 inst_base->load_r15 = 0;
889 889
890 inst_cream->dp_operation = BIT(inst, 8); 890 inst_cream->dp_operation = BIT(inst, 8);
@@ -1001,9 +1001,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index)
1001 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vdiv_inst)); 1001 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vdiv_inst));
1002 vdiv_inst *inst_cream = (vdiv_inst *)inst_base->component; 1002 vdiv_inst *inst_cream = (vdiv_inst *)inst_base->component;
1003 1003
1004 inst_base->cond = BITS(inst, 28, 31); 1004 inst_base->cond = BITS(inst, 28, 31);
1005 inst_base->idx = index; 1005 inst_base->idx = index;
1006 inst_base->br = NON_BRANCH; 1006 inst_base->br = NON_BRANCH;
1007 inst_base->load_r15 = 0; 1007 inst_base->load_r15 = 0;
1008 1008
1009 inst_cream->dp_operation = BIT(inst, 8); 1009 inst_cream->dp_operation = BIT(inst, 8);
@@ -1124,13 +1124,13 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index)
1124 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovi_inst)); 1124 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovi_inst));
1125 vmovi_inst *inst_cream = (vmovi_inst *)inst_base->component; 1125 vmovi_inst *inst_cream = (vmovi_inst *)inst_base->component;
1126 1126
1127 inst_base->cond = BITS(inst, 28, 31); 1127 inst_base->cond = BITS(inst, 28, 31);
1128 inst_base->idx = index; 1128 inst_base->idx = index;
1129 inst_base->br = NON_BRANCH; 1129 inst_base->br = NON_BRANCH;
1130 inst_base->load_r15 = 0; 1130 inst_base->load_r15 = 0;
1131 1131
1132 inst_cream->single = BIT(inst, 8) == 0; 1132 inst_cream->single = BIT(inst, 8) == 0;
1133 inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); 1133 inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4);
1134 unsigned int imm8 = BITS(inst, 16, 19) << 4 | BITS(inst, 0, 3); 1134 unsigned int imm8 = BITS(inst, 16, 19) << 4 | BITS(inst, 0, 3);
1135 if (inst_cream->single) 1135 if (inst_cream->single)
1136 inst_cream->imm = BIT(imm8, 7)<<31 | (BIT(imm8, 6)==0)<<30 | (BIT(imm8, 6) ? 0x1f : 0)<<25 | BITS(imm8, 0, 5)<<19; 1136 inst_cream->imm = BIT(imm8, 7)<<31 | (BIT(imm8, 6)==0)<<30 | (BIT(imm8, 6) ? 0x1f : 0)<<25 | BITS(imm8, 0, 5)<<19;
@@ -1215,14 +1215,14 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index)
1215 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovr_inst)); 1215 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovr_inst));
1216 vmovr_inst *inst_cream = (vmovr_inst *)inst_base->component; 1216 vmovr_inst *inst_cream = (vmovr_inst *)inst_base->component;
1217 1217
1218 inst_base->cond = BITS(inst, 28, 31); 1218 inst_base->cond = BITS(inst, 28, 31);
1219 inst_base->idx = index; 1219 inst_base->idx = index;
1220 inst_base->br = NON_BRANCH; 1220 inst_base->br = NON_BRANCH;
1221 inst_base->load_r15 = 0; 1221 inst_base->load_r15 = 0;
1222 1222
1223 inst_cream->single = BIT(inst, 8) == 0; 1223 inst_cream->single = BIT(inst, 8) == 0;
1224 inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); 1224 inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4);
1225 inst_cream->m = (inst_cream->single ? BITS(inst, 0, 3)<<1 | BIT(inst, 5) : BITS(inst, 0, 3) | BIT(inst, 5)<<4); 1225 inst_cream->m = (inst_cream->single ? BITS(inst, 0, 3)<<1 | BIT(inst, 5) : BITS(inst, 0, 3) | BIT(inst, 5)<<4);
1226 return inst_base; 1226 return inst_base;
1227} 1227}
1228#endif 1228#endif
@@ -1294,9 +1294,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index)
1294 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vabs_inst)); 1294 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vabs_inst));
1295 vabs_inst *inst_cream = (vabs_inst *)inst_base->component; 1295 vabs_inst *inst_cream = (vabs_inst *)inst_base->component;
1296 1296
1297 inst_base->cond = BITS(inst, 28, 31); 1297 inst_base->cond = BITS(inst, 28, 31);
1298 inst_base->idx = index; 1298 inst_base->idx = index;
1299 inst_base->br = NON_BRANCH; 1299 inst_base->br = NON_BRANCH;
1300 inst_base->load_r15 = 0; 1300 inst_base->load_r15 = 0;
1301 1301
1302 inst_cream->dp_operation = BIT(inst, 8); 1302 inst_cream->dp_operation = BIT(inst, 8);
@@ -1400,9 +1400,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index)
1400 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vneg_inst)); 1400 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vneg_inst));
1401 vneg_inst *inst_cream = (vneg_inst *)inst_base->component; 1401 vneg_inst *inst_cream = (vneg_inst *)inst_base->component;
1402 1402
1403 inst_base->cond = BITS(inst, 28, 31); 1403 inst_base->cond = BITS(inst, 28, 31);
1404 inst_base->idx = index; 1404 inst_base->idx = index;
1405 inst_base->br = NON_BRANCH; 1405 inst_base->br = NON_BRANCH;
1406 inst_base->load_r15 = 0; 1406 inst_base->load_r15 = 0;
1407 1407
1408 inst_cream->dp_operation = BIT(inst, 8); 1408 inst_cream->dp_operation = BIT(inst, 8);
@@ -1507,9 +1507,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index)
1507 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsqrt_inst)); 1507 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsqrt_inst));
1508 vsqrt_inst *inst_cream = (vsqrt_inst *)inst_base->component; 1508 vsqrt_inst *inst_cream = (vsqrt_inst *)inst_base->component;
1509 1509
1510 inst_base->cond = BITS(inst, 28, 31); 1510 inst_base->cond = BITS(inst, 28, 31);
1511 inst_base->idx = index; 1511 inst_base->idx = index;
1512 inst_base->br = NON_BRANCH; 1512 inst_base->br = NON_BRANCH;
1513 inst_base->load_r15 = 0; 1513 inst_base->load_r15 = 0;
1514 1514
1515 inst_cream->dp_operation = BIT(inst, 8); 1515 inst_cream->dp_operation = BIT(inst, 8);
@@ -1602,9 +1602,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index)
1602 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp_inst)); 1602 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp_inst));
1603 vcmp_inst *inst_cream = (vcmp_inst *)inst_base->component; 1603 vcmp_inst *inst_cream = (vcmp_inst *)inst_base->component;
1604 1604
1605 inst_base->cond = BITS(inst, 28, 31); 1605 inst_base->cond = BITS(inst, 28, 31);
1606 inst_base->idx = index; 1606 inst_base->idx = index;
1607 inst_base->br = NON_BRANCH; 1607 inst_base->br = NON_BRANCH;
1608 inst_base->load_r15 = 0; 1608 inst_base->load_r15 = 0;
1609 1609
1610 inst_cream->dp_operation = BIT(inst, 8); 1610 inst_cream->dp_operation = BIT(inst, 8);
@@ -1724,9 +1724,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index)
1724 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp2_inst)); 1724 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp2_inst));
1725 vcmp2_inst *inst_cream = (vcmp2_inst *)inst_base->component; 1725 vcmp2_inst *inst_cream = (vcmp2_inst *)inst_base->component;
1726 1726
1727 inst_base->cond = BITS(inst, 28, 31); 1727 inst_base->cond = BITS(inst, 28, 31);
1728 inst_base->idx = index; 1728 inst_base->idx = index;
1729 inst_base->br = NON_BRANCH; 1729 inst_base->br = NON_BRANCH;
1730 inst_base->load_r15 = 0; 1730 inst_base->load_r15 = 0;
1731 1731
1732 inst_cream->dp_operation = BIT(inst, 8); 1732 inst_cream->dp_operation = BIT(inst, 8);
@@ -1846,9 +1846,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index)
1846 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbds_inst)); 1846 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbds_inst));
1847 vcvtbds_inst *inst_cream = (vcvtbds_inst *)inst_base->component; 1847 vcvtbds_inst *inst_cream = (vcvtbds_inst *)inst_base->component;
1848 1848
1849 inst_base->cond = BITS(inst, 28, 31); 1849 inst_base->cond = BITS(inst, 28, 31);
1850 inst_base->idx = index; 1850 inst_base->idx = index;
1851 inst_base->br = NON_BRANCH; 1851 inst_base->br = NON_BRANCH;
1852 inst_base->load_r15 = 0; 1852 inst_base->load_r15 = 0;
1853 1853
1854 inst_cream->dp_operation = BIT(inst, 8); 1854 inst_cream->dp_operation = BIT(inst, 8);
@@ -2016,9 +2016,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index)
2016 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbfi_inst)); 2016 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbfi_inst));
2017 vcvtbfi_inst *inst_cream = (vcvtbfi_inst *)inst_base->component; 2017 vcvtbfi_inst *inst_cream = (vcvtbfi_inst *)inst_base->component;
2018 2018
2019 inst_base->cond = BITS(inst, 28, 31); 2019 inst_base->cond = BITS(inst, 28, 31);
2020 inst_base->idx = index; 2020 inst_base->idx = index;
2021 inst_base->br = NON_BRANCH; 2021 inst_base->br = NON_BRANCH;
2022 inst_base->load_r15 = 0; 2022 inst_base->load_r15 = 0;
2023 2023
2024 inst_cream->dp_operation = BIT(inst, 8); 2024 inst_cream->dp_operation = BIT(inst, 8);
@@ -2188,14 +2188,14 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index)
2188 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrs_inst)); 2188 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrs_inst));
2189 vmovbrs_inst *inst_cream = (vmovbrs_inst *)inst_base->component; 2189 vmovbrs_inst *inst_cream = (vmovbrs_inst *)inst_base->component;
2190 2190
2191 inst_base->cond = BITS(inst, 28, 31); 2191 inst_base->cond = BITS(inst, 28, 31);
2192 inst_base->idx = index; 2192 inst_base->idx = index;
2193 inst_base->br = NON_BRANCH; 2193 inst_base->br = NON_BRANCH;
2194 inst_base->load_r15 = 0; 2194 inst_base->load_r15 = 0;
2195 2195
2196 inst_cream->to_arm = BIT(inst, 20) == 1; 2196 inst_cream->to_arm = BIT(inst, 20) == 1;
2197 inst_cream->t = BITS(inst, 12, 15); 2197 inst_cream->t = BITS(inst, 12, 15);
2198 inst_cream->n = BIT(inst, 7) | BITS(inst, 16, 19)<<1; 2198 inst_cream->n = BIT(inst, 7) | BITS(inst, 16, 19)<<1;
2199 2199
2200 return inst_base; 2200 return inst_base;
2201} 2201}
@@ -2268,13 +2268,13 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index)
2268 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmsr_inst)); 2268 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmsr_inst));
2269 vmsr_inst *inst_cream = (vmsr_inst *)inst_base->component; 2269 vmsr_inst *inst_cream = (vmsr_inst *)inst_base->component;
2270 2270
2271 inst_base->cond = BITS(inst, 28, 31); 2271 inst_base->cond = BITS(inst, 28, 31);
2272 inst_base->idx = index; 2272 inst_base->idx = index;
2273 inst_base->br = NON_BRANCH; 2273 inst_base->br = NON_BRANCH;
2274 inst_base->load_r15 = 0; 2274 inst_base->load_r15 = 0;
2275 2275
2276 inst_cream->reg = BITS(inst, 16, 19); 2276 inst_cream->reg = BITS(inst, 16, 19);
2277 inst_cream->Rd = BITS(inst, 12, 15); 2277 inst_cream->Rd = BITS(inst, 12, 15);
2278 2278
2279 return inst_base; 2279 return inst_base;
2280} 2280}
@@ -2367,9 +2367,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index)
2367 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrc_inst)); 2367 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrc_inst));
2368 vmovbrc_inst *inst_cream = (vmovbrc_inst *)inst_base->component; 2368 vmovbrc_inst *inst_cream = (vmovbrc_inst *)inst_base->component;
2369 2369
2370 inst_base->cond = BITS(inst, 28, 31); 2370 inst_base->cond = BITS(inst, 28, 31);
2371 inst_base->idx = index; 2371 inst_base->idx = index;
2372 inst_base->br = NON_BRANCH; 2372 inst_base->br = NON_BRANCH;
2373 inst_base->load_r15 = 0; 2373 inst_base->load_r15 = 0;
2374 2374
2375 inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; 2375 inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4;
@@ -2436,13 +2436,13 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index)
2436 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmrs_inst)); 2436 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmrs_inst));
2437 vmrs_inst *inst_cream = (vmrs_inst *)inst_base->component; 2437 vmrs_inst *inst_cream = (vmrs_inst *)inst_base->component;
2438 2438
2439 inst_base->cond = BITS(inst, 28, 31); 2439 inst_base->cond = BITS(inst, 28, 31);
2440 inst_base->idx = index; 2440 inst_base->idx = index;
2441 inst_base->br = NON_BRANCH; 2441 inst_base->br = NON_BRANCH;
2442 inst_base->load_r15 = 0; 2442 inst_base->load_r15 = 0;
2443 2443
2444 inst_cream->reg = BITS(inst, 16, 19); 2444 inst_cream->reg = BITS(inst, 16, 19);
2445 inst_cream->Rt = BITS(inst, 12, 15); 2445 inst_cream->Rt = BITS(inst, 12, 15);
2446 2446
2447 return inst_base; 2447 return inst_base;
2448} 2448}
@@ -2596,9 +2596,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index)
2596 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbcr_inst)); 2596 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbcr_inst));
2597 vmovbcr_inst *inst_cream = (vmovbcr_inst *)inst_base->component; 2597 vmovbcr_inst *inst_cream = (vmovbcr_inst *)inst_base->component;
2598 2598
2599 inst_base->cond = BITS(inst, 28, 31); 2599 inst_base->cond = BITS(inst, 28, 31);
2600 inst_base->idx = index; 2600 inst_base->idx = index;
2601 inst_base->br = NON_BRANCH; 2601 inst_base->br = NON_BRANCH;
2602 inst_base->load_r15 = 0; 2602 inst_base->load_r15 = 0;
2603 2603
2604 inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; 2604 inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4;
@@ -2672,15 +2672,15 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int index)
2672 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrss_inst)); 2672 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrss_inst));
2673 vmovbrrss_inst *inst_cream = (vmovbrrss_inst *)inst_base->component; 2673 vmovbrrss_inst *inst_cream = (vmovbrrss_inst *)inst_base->component;
2674 2674
2675 inst_base->cond = BITS(inst, 28, 31); 2675 inst_base->cond = BITS(inst, 28, 31);
2676 inst_base->idx = index; 2676 inst_base->idx = index;
2677 inst_base->br = NON_BRANCH; 2677 inst_base->br = NON_BRANCH;
2678 inst_base->load_r15 = 0; 2678 inst_base->load_r15 = 0;
2679 2679
2680 inst_cream->to_arm = BIT(inst, 20) == 1; 2680 inst_cream->to_arm = BIT(inst, 20) == 1;
2681 inst_cream->t = BITS(inst, 12, 15); 2681 inst_cream->t = BITS(inst, 12, 15);
2682 inst_cream->t2 = BITS(inst, 16, 19); 2682 inst_cream->t2 = BITS(inst, 16, 19);
2683 inst_cream->m = BITS(inst, 0, 3)<<1|BIT(inst, 5); 2683 inst_cream->m = BITS(inst, 0, 3)<<1|BIT(inst, 5);
2684 2684
2685 return inst_base; 2685 return inst_base;
2686} 2686}
@@ -2756,15 +2756,15 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index)
2756 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrd_inst)); 2756 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrd_inst));
2757 vmovbrrd_inst *inst_cream = (vmovbrrd_inst *)inst_base->component; 2757 vmovbrrd_inst *inst_cream = (vmovbrrd_inst *)inst_base->component;
2758 2758
2759 inst_base->cond = BITS(inst, 28, 31); 2759 inst_base->cond = BITS(inst, 28, 31);
2760 inst_base->idx = index; 2760 inst_base->idx = index;
2761 inst_base->br = NON_BRANCH; 2761 inst_base->br = NON_BRANCH;
2762 inst_base->load_r15 = 0; 2762 inst_base->load_r15 = 0;
2763 2763
2764 inst_cream->to_arm = BIT(inst, 20) == 1; 2764 inst_cream->to_arm = BIT(inst, 20) == 1;
2765 inst_cream->t = BITS(inst, 12, 15); 2765 inst_cream->t = BITS(inst, 12, 15);
2766 inst_cream->t2 = BITS(inst, 16, 19); 2766 inst_cream->t2 = BITS(inst, 16, 19);
2767 inst_cream->m = BIT(inst, 5)<<4 | BITS(inst, 0, 3); 2767 inst_cream->m = BIT(inst, 5)<<4 | BITS(inst, 0, 3);
2768 2768
2769 return inst_base; 2769 return inst_base;
2770} 2770}
@@ -2846,16 +2846,16 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index)
2846 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstr_inst)); 2846 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstr_inst));
2847 vstr_inst *inst_cream = (vstr_inst *)inst_base->component; 2847 vstr_inst *inst_cream = (vstr_inst *)inst_base->component;
2848 2848
2849 inst_base->cond = BITS(inst, 28, 31); 2849 inst_base->cond = BITS(inst, 28, 31);
2850 inst_base->idx = index; 2850 inst_base->idx = index;
2851 inst_base->br = NON_BRANCH; 2851 inst_base->br = NON_BRANCH;
2852 inst_base->load_r15 = 0; 2852 inst_base->load_r15 = 0;
2853 2853
2854 inst_cream->single = BIT(inst, 8) == 0; 2854 inst_cream->single = BIT(inst, 8) == 0;
2855 inst_cream->add = BIT(inst, 23); 2855 inst_cream->add = BIT(inst, 23);
2856 inst_cream->imm32 = BITS(inst, 0,7) << 2; 2856 inst_cream->imm32 = BITS(inst, 0,7) << 2;
2857 inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); 2857 inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4);
2858 inst_cream->n = BITS(inst, 16, 19); 2858 inst_cream->n = BITS(inst, 16, 19);
2859 2859
2860 return inst_base; 2860 return inst_base;
2861} 2861}
@@ -2907,10 +2907,10 @@ int DYNCOM_TAG(vstr)(cpu_t *cpu, addr_t pc, uint32_t instr, tag_t *tag, addr_t *
2907#ifdef VFP_DYNCOM_TRANS 2907#ifdef VFP_DYNCOM_TRANS
2908int DYNCOM_TRANS(vstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){ 2908int DYNCOM_TRANS(vstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
2909 int single = BIT(8) == 0; 2909 int single = BIT(8) == 0;
2910 int add = BIT(23); 2910 int add = BIT(23);
2911 int imm32 = BITS(0,7) << 2; 2911 int imm32 = BITS(0,7) << 2;
2912 int d = (single ? BITS(12, 15)<<1|BIT(22) : BITS(12, 15)|(BIT(22)<<4)); 2912 int d = (single ? BITS(12, 15)<<1|BIT(22) : BITS(12, 15)|(BIT(22)<<4));
2913 int n = BITS(16, 19); 2913 int n = BITS(16, 19);
2914 2914
2915 Value* base = (n == 15) ? ADD(AND(R(n), CONST(0xFFFFFFFC)), CONST(8)): R(n); 2915 Value* base = (n == 15) ? ADD(AND(R(n), CONST(0xFFFFFFFC)), CONST(8)): R(n);
2916 Value* Addr = add ? ADD(base, CONST(imm32)) : SUB(base, CONST(imm32)); 2916 Value* Addr = add ? ADD(base, CONST(imm32)) : SUB(base, CONST(imm32));
@@ -2956,9 +2956,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index)
2956 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpush_inst)); 2956 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpush_inst));
2957 vpush_inst *inst_cream = (vpush_inst *)inst_base->component; 2957 vpush_inst *inst_cream = (vpush_inst *)inst_base->component;
2958 2958
2959 inst_base->cond = BITS(inst, 28, 31); 2959 inst_base->cond = BITS(inst, 28, 31);
2960 inst_base->idx = index; 2960 inst_base->idx = index;
2961 inst_base->br = NON_BRANCH; 2961 inst_base->br = NON_BRANCH;
2962 inst_base->load_r15 = 0; 2962 inst_base->load_r15 = 0;
2963 2963
2964 inst_cream->single = BIT(inst, 8) == 0; 2964 inst_cream->single = BIT(inst, 8) == 0;
@@ -2974,13 +2974,12 @@ VPUSH_INST:
2974{ 2974{
2975 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { 2975 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
2976 CHECK_VFP_ENABLED; 2976 CHECK_VFP_ENABLED;
2977 int i;
2978 2977
2979 vpush_inst *inst_cream = (vpush_inst *)inst_base->component; 2978 vpush_inst *inst_cream = (vpush_inst *)inst_base->component;
2980 2979
2981 addr = cpu->Reg[R13] - inst_cream->imm32; 2980 addr = cpu->Reg[R13] - inst_cream->imm32;
2982 2981
2983 for (i = 0; i < inst_cream->regs; i++) 2982 for (int i = 0; i < inst_cream->regs; i++)
2984 { 2983 {
2985 if (inst_cream->single) 2984 if (inst_cream->single)
2986 { 2985 {
@@ -3032,8 +3031,8 @@ int DYNCOM_TRANS(vpush)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
3032 //else 3031 //else
3033 // bb = arch_check_mm(cpu, bb, Addr, regs * 8, 0, cpu->dyncom_engine->bb_trap); 3032 // bb = arch_check_mm(cpu, bb, Addr, regs * 8, 0, cpu->dyncom_engine->bb_trap);
3034 //Value* phys_addr; 3033 //Value* phys_addr;
3035 int i; 3034
3036 for (i = 0; i < regs; i++) 3035 for (int i = 0; i < regs; i++)
3037 { 3036 {
3038 if (single) 3037 if (single)
3039 { 3038 {
@@ -3084,9 +3083,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index)
3084 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstm_inst)); 3083 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstm_inst));
3085 vstm_inst *inst_cream = (vstm_inst *)inst_base->component; 3084 vstm_inst *inst_cream = (vstm_inst *)inst_base->component;
3086 3085
3087 inst_base->cond = BITS(inst, 28, 31); 3086 inst_base->cond = BITS(inst, 28, 31);
3088 inst_base->idx = index; 3087 inst_base->idx = index;
3089 inst_base->br = NON_BRANCH; 3088 inst_base->br = NON_BRANCH;
3090 inst_base->load_r15 = 0; 3089 inst_base->load_r15 = 0;
3091 3090
3092 inst_cream->single = BIT(inst, 8) == 0; 3091 inst_cream->single = BIT(inst, 8) == 0;
@@ -3106,13 +3105,11 @@ VSTM_INST: /* encoding 1 */
3106 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { 3105 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
3107 CHECK_VFP_ENABLED; 3106 CHECK_VFP_ENABLED;
3108 3107
3109 int i;
3110
3111 vstm_inst *inst_cream = (vstm_inst *)inst_base->component; 3108 vstm_inst *inst_cream = (vstm_inst *)inst_base->component;
3112 3109
3113 addr = (inst_cream->add ? cpu->Reg[inst_cream->n] : cpu->Reg[inst_cream->n] - inst_cream->imm32); 3110 addr = (inst_cream->add ? cpu->Reg[inst_cream->n] : cpu->Reg[inst_cream->n] - inst_cream->imm32);
3114 3111
3115 for (i = 0; i < inst_cream->regs; i++) 3112 for (int i = 0; i < inst_cream->regs; i++)
3116 { 3113 {
3117 if (inst_cream->single) 3114 if (inst_cream->single)
3118 { 3115 {
@@ -3237,9 +3234,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index)
3237 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpop_inst)); 3234 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpop_inst));
3238 vpop_inst *inst_cream = (vpop_inst *)inst_base->component; 3235 vpop_inst *inst_cream = (vpop_inst *)inst_base->component;
3239 3236
3240 inst_base->cond = BITS(inst, 28, 31); 3237 inst_base->cond = BITS(inst, 28, 31);
3241 inst_base->idx = index; 3238 inst_base->idx = index;
3242 inst_base->br = NON_BRANCH; 3239 inst_base->br = NON_BRANCH;
3243 inst_base->load_r15 = 0; 3240 inst_base->load_r15 = 0;
3244 3241
3245 inst_cream->single = BIT(inst, 8) == 0; 3242 inst_cream->single = BIT(inst, 8) == 0;
@@ -3256,14 +3253,13 @@ VPOP_INST:
3256 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { 3253 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
3257 CHECK_VFP_ENABLED; 3254 CHECK_VFP_ENABLED;
3258 3255
3259 int i;
3260 unsigned int value1, value2; 3256 unsigned int value1, value2;
3261 3257
3262 vpop_inst *inst_cream = (vpop_inst *)inst_base->component; 3258 vpop_inst *inst_cream = (vpop_inst *)inst_base->component;
3263 3259
3264 addr = cpu->Reg[R13]; 3260 addr = cpu->Reg[R13];
3265 3261
3266 for (i = 0; i < inst_cream->regs; i++) 3262 for (int i = 0; i < inst_cream->regs; i++)
3267 { 3263 {
3268 if (inst_cream->single) 3264 if (inst_cream->single)
3269 { 3265 {
@@ -3379,16 +3375,16 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index)
3379 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldr_inst)); 3375 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldr_inst));
3380 vldr_inst *inst_cream = (vldr_inst *)inst_base->component; 3376 vldr_inst *inst_cream = (vldr_inst *)inst_base->component;
3381 3377
3382 inst_base->cond = BITS(inst, 28, 31); 3378 inst_base->cond = BITS(inst, 28, 31);
3383 inst_base->idx = index; 3379 inst_base->idx = index;
3384 inst_base->br = NON_BRANCH; 3380 inst_base->br = NON_BRANCH;
3385 inst_base->load_r15 = 0; 3381 inst_base->load_r15 = 0;
3386 3382
3387 inst_cream->single = BIT(inst, 8) == 0; 3383 inst_cream->single = BIT(inst, 8) == 0;
3388 inst_cream->add = BIT(inst, 23); 3384 inst_cream->add = BIT(inst, 23);
3389 inst_cream->imm32 = BITS(inst, 0,7) << 2; 3385 inst_cream->imm32 = BITS(inst, 0,7) << 2;
3390 inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); 3386 inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4);
3391 inst_cream->n = BITS(inst, 16, 19); 3387 inst_cream->n = BITS(inst, 16, 19);
3392 3388
3393 return inst_base; 3389 return inst_base;
3394} 3390}
@@ -3511,9 +3507,9 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index)
3511 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldm_inst)); 3507 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldm_inst));
3512 vldm_inst *inst_cream = (vldm_inst *)inst_base->component; 3508 vldm_inst *inst_cream = (vldm_inst *)inst_base->component;
3513 3509
3514 inst_base->cond = BITS(inst, 28, 31); 3510 inst_base->cond = BITS(inst, 28, 31);
3515 inst_base->idx = index; 3511 inst_base->idx = index;
3516 inst_base->br = NON_BRANCH; 3512 inst_base->br = NON_BRANCH;
3517 inst_base->load_r15 = 0; 3513 inst_base->load_r15 = 0;
3518 3514
3519 inst_cream->single = BIT(inst, 8) == 0; 3515 inst_cream->single = BIT(inst, 8) == 0;
@@ -3533,13 +3529,11 @@ VLDM_INST:
3533 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { 3529 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
3534 CHECK_VFP_ENABLED; 3530 CHECK_VFP_ENABLED;
3535 3531
3536 int i;
3537
3538 vldm_inst *inst_cream = (vldm_inst *)inst_base->component; 3532 vldm_inst *inst_cream = (vldm_inst *)inst_base->component;
3539 3533
3540 addr = (inst_cream->add ? cpu->Reg[inst_cream->n] : cpu->Reg[inst_cream->n] - inst_cream->imm32); 3534 addr = (inst_cream->add ? cpu->Reg[inst_cream->n] : cpu->Reg[inst_cream->n] - inst_cream->imm32);
3541 3535
3542 for (i = 0; i < inst_cream->regs; i++) 3536 for (int i = 0; i < inst_cream->regs; i++)
3543 { 3537 {
3544 if (inst_cream->single) 3538 if (inst_cream->single)
3545 { 3539 {
HIC SVNT DRACONES