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| author | 2014-05-17 13:35:20 -0400 | |
|---|---|---|
| committer | 2014-05-17 13:35:20 -0400 | |
| commit | 3fac6dc39e6e94aa068d93535261eede97224e50 (patch) | |
| tree | 41b5a266814d633b94d090f13bc46c89e8f7f622 /src/core | |
| parent | - added enum ThreadProcessorId (diff) | |
| parent | updated how we call ARM core to make things much faster (diff) | |
| download | yuzu-3fac6dc39e6e94aa068d93535261eede97224e50.tar.gz yuzu-3fac6dc39e6e94aa068d93535261eede97224e50.tar.xz yuzu-3fac6dc39e6e94aa068d93535261eede97224e50.zip | |
Merge branch 'master' into threading
Diffstat (limited to 'src/core')
| -rw-r--r-- | src/core/arm/arm_interface.h | 21 | ||||
| -rw-r--r-- | src/core/arm/interpreter/arm_interpreter.cpp | 19 | ||||
| -rw-r--r-- | src/core/arm/interpreter/arm_interpreter.h | 7 | ||||
| -rw-r--r-- | src/core/arm/interpreter/armdefs.h | 1 | ||||
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 2 | ||||
| -rw-r--r-- | src/core/core.cpp | 9 |
6 files changed, 36 insertions, 23 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 602c91e30..5c382ebbd 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h | |||
| @@ -17,12 +17,20 @@ public: | |||
| 17 | ~ARM_Interface() { | 17 | ~ARM_Interface() { |
| 18 | } | 18 | } |
| 19 | 19 | ||
| 20 | /** | ||
| 21 | * Runs the CPU for the given number of instructions | ||
| 22 | * @param num_instructions Number of instructions to run | ||
| 23 | */ | ||
| 24 | void Run(int num_instructions) { | ||
| 25 | ExecuteInstructions(num_instructions); | ||
| 26 | m_num_instructions += num_instructions; | ||
| 27 | } | ||
| 28 | |||
| 20 | /// Step CPU by one instruction | 29 | /// Step CPU by one instruction |
| 21 | void Step() { | 30 | void Step() { |
| 22 | ExecuteInstruction(); | 31 | Run(1); |
| 23 | m_num_instructions++; | ||
| 24 | } | 32 | } |
| 25 | 33 | ||
| 26 | /** | 34 | /** |
| 27 | * Set the Program Counter to an address | 35 | * Set the Program Counter to an address |
| 28 | * @param addr Address to set PC to | 36 | * @param addr Address to set PC to |
| @@ -74,8 +82,11 @@ public: | |||
| 74 | 82 | ||
| 75 | protected: | 83 | protected: |
| 76 | 84 | ||
| 77 | /// Execture next instruction | 85 | /** |
| 78 | virtual void ExecuteInstruction() = 0; | 86 | * Executes the given number of instructions |
| 87 | * @param num_instructions Number of instructions to executes | ||
| 88 | */ | ||
| 89 | virtual void ExecuteInstructions(int num_instructions) = 0; | ||
| 79 | 90 | ||
| 80 | private: | 91 | private: |
| 81 | 92 | ||
diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp index 4e1387fdb..c21ff0464 100644 --- a/src/core/arm/interpreter/arm_interpreter.cpp +++ b/src/core/arm/interpreter/arm_interpreter.cpp | |||
| @@ -93,16 +93,11 @@ u64 ARM_Interpreter::GetTicks() const { | |||
| 93 | return ARMul_Time(m_state); | 93 | return ARMul_Time(m_state); |
| 94 | } | 94 | } |
| 95 | 95 | ||
| 96 | /// Execture next instruction | 96 | /** |
| 97 | void ARM_Interpreter::ExecuteInstruction() { | 97 | * Executes the given number of instructions |
| 98 | m_state->step++; | 98 | * @param num_instructions Number of instructions to executes |
| 99 | m_state->cycle++; | 99 | */ |
| 100 | m_state->EndCondition = 0; | 100 | void ARM_Interpreter::ExecuteInstructions(int num_instructions) { |
| 101 | m_state->stop_simulator = 0; | 101 | m_state->NumInstrsToExecute = num_instructions; |
| 102 | m_state->NextInstr = RESUME; | 102 | ARMul_Emulate32(m_state); |
| 103 | m_state->last_pc = m_state->Reg[15]; | ||
| 104 | m_state->Reg[15] = ARMul_DoInstr(m_state); | ||
| 105 | m_state->Cpsr = ((m_state->Cpsr & 0x0fffffdf) | (m_state->NFlag << 31) | (m_state->ZFlag << 30) | | ||
| 106 | (m_state->CFlag << 29) | (m_state->VFlag << 28) | (m_state->TFlag << 5)); | ||
| 107 | m_state->NextInstr |= PRIMEPIPE; // Flush pipe | ||
| 108 | } | 103 | } |
diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h index 78b188bee..474ba3e45 100644 --- a/src/core/arm/interpreter/arm_interpreter.h +++ b/src/core/arm/interpreter/arm_interpreter.h | |||
| @@ -62,8 +62,11 @@ public: | |||
| 62 | 62 | ||
| 63 | protected: | 63 | protected: |
| 64 | 64 | ||
| 65 | /// Execture next instruction | 65 | /** |
| 66 | void ExecuteInstruction(); | 66 | * Executes the given number of instructions |
| 67 | * @param num_instructions Number of instructions to executes | ||
| 68 | */ | ||
| 69 | void ExecuteInstructions(int num_instructions); | ||
| 67 | 70 | ||
| 68 | private: | 71 | private: |
| 69 | 72 | ||
diff --git a/src/core/arm/interpreter/armdefs.h b/src/core/arm/interpreter/armdefs.h index 821825ae6..5b2abc7f7 100644 --- a/src/core/arm/interpreter/armdefs.h +++ b/src/core/arm/interpreter/armdefs.h | |||
| @@ -288,6 +288,7 @@ struct ARMul_State | |||
| 288 | ARMword loaded_addr, decoded_addr; /* saved pipeline state addr*/ | 288 | ARMword loaded_addr, decoded_addr; /* saved pipeline state addr*/ |
| 289 | unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */ | 289 | unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */ |
| 290 | unsigned long long NumInstrs; /* the number of instructions executed */ | 290 | unsigned long long NumInstrs; /* the number of instructions executed */ |
| 291 | unsigned NumInstrsToExecute; | ||
| 291 | unsigned NextInstr; | 292 | unsigned NextInstr; |
| 292 | unsigned VectorCatch; /* caught exception mask */ | 293 | unsigned VectorCatch; /* caught exception mask */ |
| 293 | unsigned CallDebug; /* set to call the debugger */ | 294 | unsigned CallDebug; /* set to call the debugger */ |
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 87141653f..32e315f4b 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp | |||
| @@ -4734,7 +4734,7 @@ TEST_EMULATE: | |||
| 4734 | else if (state->Emulate != RUN) | 4734 | else if (state->Emulate != RUN) |
| 4735 | break; | 4735 | break; |
| 4736 | } | 4736 | } |
| 4737 | while (!state->stop_simulator); | 4737 | while (state->NumInstrsToExecute--); |
| 4738 | 4738 | ||
| 4739 | state->decoded = decoded; | 4739 | state->decoded = decoded; |
| 4740 | state->loaded = loaded; | 4740 | state->loaded = loaded; |
diff --git a/src/core/core.cpp b/src/core/core.cpp index 859a62c78..61c237b2c 100644 --- a/src/core/core.cpp +++ b/src/core/core.cpp | |||
| @@ -4,8 +4,9 @@ | |||
| 4 | 4 | ||
| 5 | #include "common/common_types.h" | 5 | #include "common/common_types.h" |
| 6 | #include "common/log.h" | 6 | #include "common/log.h" |
| 7 | #include "core/core.h" | 7 | #include "common/symbols.h" |
| 8 | 8 | ||
| 9 | #include "core/core.h" | ||
| 9 | #include "core/mem_map.h" | 10 | #include "core/mem_map.h" |
| 10 | #include "core/hw/hw.h" | 11 | #include "core/hw/hw.h" |
| 11 | #include "core/arm/disassembler/arm_disasm.h" | 12 | #include "core/arm/disassembler/arm_disasm.h" |
| @@ -19,13 +20,15 @@ ARM_Interface* g_sys_core = NULL; ///< ARM11 system (OS) core | |||
| 19 | 20 | ||
| 20 | /// Run the core CPU loop | 21 | /// Run the core CPU loop |
| 21 | void RunLoop() { | 22 | void RunLoop() { |
| 22 | // TODO(ShizZy): ImplementMe | 23 | for (;;){ |
| 24 | g_app_core->Run(10000); | ||
| 25 | HW::Update(); | ||
| 26 | } | ||
| 23 | } | 27 | } |
| 24 | 28 | ||
| 25 | /// Step the CPU one instruction | 29 | /// Step the CPU one instruction |
| 26 | void SingleStep() { | 30 | void SingleStep() { |
| 27 | g_app_core->Step(); | 31 | g_app_core->Step(); |
| 28 | HW::Update(); | ||
| 29 | } | 32 | } |
| 30 | 33 | ||
| 31 | /// Halt the core | 34 | /// Halt the core |