diff options
| author | 2015-03-08 21:48:35 -0400 | |
|---|---|---|
| committer | 2015-03-08 22:03:06 -0400 | |
| commit | 36dab56c31e05f4b01a9fec5052ef8154c34a93c (patch) | |
| tree | a7ce1e7843aab9b68c9f244722bff8984d086def /src/core | |
| parent | dyncom: Increment addr when accessing LR in LDM (diff) | |
| download | yuzu-36dab56c31e05f4b01a9fec5052ef8154c34a93c.tar.gz yuzu-36dab56c31e05f4b01a9fec5052ef8154c34a93c.tar.xz yuzu-36dab56c31e05f4b01a9fec5052ef8154c34a93c.zip | |
dyncom: General cleanup of STM
Diffstat (limited to 'src/core')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 81ab5cd21..ba09c58b7 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -5983,47 +5983,45 @@ unsigned InterpreterMainLoop(ARMul_State* state) { | |||
| 5983 | inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); | 5983 | inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); |
| 5984 | if (BIT(inst_cream->inst, 22) == 1) { | 5984 | if (BIT(inst_cream->inst, 22) == 1) { |
| 5985 | for (i = 0; i < 13; i++) { | 5985 | for (i = 0; i < 13; i++) { |
| 5986 | if(BIT(inst_cream->inst, i)) { | 5986 | if (BIT(inst_cream->inst, i)) { |
| 5987 | Memory::Write32(addr, cpu->Reg[i]); | 5987 | Memory::Write32(addr, cpu->Reg[i]); |
| 5988 | addr += 4; | 5988 | addr += 4; |
| 5989 | } | 5989 | } |
| 5990 | } | 5990 | } |
| 5991 | if (BIT(inst_cream->inst, 13)) { | 5991 | if (BIT(inst_cream->inst, 13)) { |
| 5992 | if (cpu->Mode == USER32MODE) { | 5992 | if (cpu->Mode == USER32MODE) |
| 5993 | Memory::Write32(addr, cpu->Reg[i]); | 5993 | Memory::Write32(addr, cpu->Reg[i]); |
| 5994 | addr += 4; | 5994 | else |
| 5995 | } else { | ||
| 5996 | Memory::Write32(addr, cpu->Reg_usr[0]); | 5995 | Memory::Write32(addr, cpu->Reg_usr[0]); |
| 5997 | addr += 4; | 5996 | |
| 5998 | } | 5997 | addr += 4; |
| 5999 | } | 5998 | } |
| 6000 | if (BIT(inst_cream->inst, 14)) { | 5999 | if (BIT(inst_cream->inst, 14)) { |
| 6001 | if (cpu->Mode == USER32MODE) { | 6000 | if (cpu->Mode == USER32MODE) |
| 6002 | Memory::Write32(addr, cpu->Reg[i]); | 6001 | Memory::Write32(addr, cpu->Reg[i]); |
| 6003 | addr += 4; | 6002 | else |
| 6004 | } else { | ||
| 6005 | Memory::Write32(addr, cpu->Reg_usr[1]); | 6003 | Memory::Write32(addr, cpu->Reg_usr[1]); |
| 6006 | addr += 4; | 6004 | |
| 6007 | } | 6005 | addr += 4; |
| 6008 | } | 6006 | } |
| 6009 | if (BIT(inst_cream->inst, 15)) { | 6007 | if (BIT(inst_cream->inst, 15)) { |
| 6010 | Memory::Write32(addr, cpu->Reg_usr[1] + 8); | 6008 | Memory::Write32(addr, cpu->Reg_usr[1] + 8); |
| 6011 | } | 6009 | } |
| 6012 | } else { | 6010 | } else { |
| 6013 | for( i = 0; i < 15; i++ ) { | 6011 | for (i = 0; i < 15; i++) { |
| 6014 | if(BIT(inst_cream->inst, i)) { | 6012 | if (BIT(inst_cream->inst, i)) { |
| 6015 | if(i == Rn) | 6013 | if (i == Rn) |
| 6016 | Memory::Write32(addr, old_RN); | 6014 | Memory::Write32(addr, old_RN); |
| 6017 | else | 6015 | else |
| 6018 | Memory::Write32(addr, cpu->Reg[i]); | 6016 | Memory::Write32(addr, cpu->Reg[i]); |
| 6017 | |||
| 6019 | addr += 4; | 6018 | addr += 4; |
| 6020 | } | 6019 | } |
| 6021 | } | 6020 | } |
| 6022 | 6021 | ||
| 6023 | // Check PC reg | 6022 | // Check PC reg |
| 6024 | if(BIT(inst_cream->inst, i)) { | 6023 | if (BIT(inst_cream->inst, 15)) |
| 6025 | Memory::Write32(addr, cpu->Reg_usr[1] + 8); | 6024 | Memory::Write32(addr, cpu->Reg_usr[1] + 8); |
| 6026 | } | ||
| 6027 | } | 6025 | } |
| 6028 | } | 6026 | } |
| 6029 | cpu->Reg[15] += GET_INST_SIZE(cpu); | 6027 | cpu->Reg[15] += GET_INST_SIZE(cpu); |