core/memory: Amend address widths in asserts

Addresses are 64-bit, these formatting specifiers are simply holdovers from citra. Adjust them to be the correct width.

1 files changed, 2 insertions, 2 deletions

diff --git a/src/core/memory.cpp b/src/core/memory.cpp
index 9c207b74a..d7c0080fa 100644
--- a/src/core/memory.cpp
+++ b/src/core/memory.cpp
@@ -172,7 +172,7 @@ T Read(const VAddr vaddr) {
         NGLOG_ERROR(HW_Memory, "Unmapped Read{} @ {:#010X}", sizeof(T) * 8, vaddr);
         return 0;
     case PageType::Memory:
-        ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
+        ASSERT_MSG(false, "Mapped memory page without a pointer @ %016" PRIX64, vaddr);
         break;
     case PageType::RasterizerCachedMemory: {
         RasterizerFlushVirtualRegion(vaddr, sizeof(T), FlushMode::Flush);
@@ -205,7 +205,7 @@ void Write(const VAddr vaddr, const T data) {
                     vaddr);
         return;
     case PageType::Memory:
-        ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
+        ASSERT_MSG(false, "Mapped memory page without a pointer @ %016" PRIX64, vaddr);
         break;
     case PageType::RasterizerCachedMemory: {
         RasterizerFlushVirtualRegion(vaddr, sizeof(T), FlushMode::Invalidate);