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authorGravatar bunnei2014-04-12 21:55:36 -0400
committerGravatar bunnei2014-04-12 21:55:36 -0400
commit68e198476f17a026fed88f3c9a271aa768694354 (patch)
treec8b368e45afd8fd70c69ce7be7e28879eda8d8aa /src/core/mem_map.cpp
parenthacked CPU interpreter to ignore branch on SVC instruction (as we are HLEing ... (diff)
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- added HLE to connect to "srv:" service
- added a manager for keeping track of services/ports - added a memory mapped region for memory accessed by HLE - added HLE for GetThreadCommandBuffer function
Diffstat (limited to 'src/core/mem_map.cpp')
-rw-r--r--src/core/mem_map.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/core/mem_map.cpp b/src/core/mem_map.cpp
index a5865d785..5b5c57fca 100644
--- a/src/core/mem_map.cpp
+++ b/src/core/mem_map.cpp
@@ -1,4 +1,4 @@
1// Copyright 2014 Citra Emulator Project 1 // Copyright 2014 Citra Emulator Project
2// Licensed under GPLv2 2// Licensed under GPLv2
3// Refer to the license.txt file included. 3// Refer to the license.txt file included.
4 4
@@ -12,7 +12,6 @@
12 12
13namespace Memory { 13namespace Memory {
14 14
15
16u8* g_base = NULL; ///< The base pointer to the auto-mirrored arena. 15u8* g_base = NULL; ///< The base pointer to the auto-mirrored arena.
17 16
18MemArena g_arena; ///< The MemArena class 17MemArena g_arena; ///< The MemArena class