diff options
| author | 2015-03-10 18:08:55 -0400 | |
|---|---|---|
| committer | 2015-03-10 18:08:55 -0400 | |
| commit | b56829df020a81248dd04688ff2b307f3444a09f (patch) | |
| tree | 24a438627339b2d506e659adfa0873cdf037852a /src/core/hw | |
| parent | Merge pull request #649 from lioncash/clean (diff) | |
| parent | Added LCD registers, and implementation for color filling in OGL code. (diff) | |
| download | yuzu-b56829df020a81248dd04688ff2b307f3444a09f.tar.gz yuzu-b56829df020a81248dd04688ff2b307f3444a09f.tar.xz yuzu-b56829df020a81248dd04688ff2b307f3444a09f.zip | |
Merge pull request #629 from archshift/lcdfb
Implement SetLcdForceBlack and add implementation for color filling in the GPU code
Diffstat (limited to 'src/core/hw')
| -rw-r--r-- | src/core/hw/gpu.cpp | 9 | ||||
| -rw-r--r-- | src/core/hw/gpu.h | 2 | ||||
| -rw-r--r-- | src/core/hw/hw.cpp | 38 | ||||
| -rw-r--r-- | src/core/hw/hw.h | 24 | ||||
| -rw-r--r-- | src/core/hw/lcd.cpp | 66 | ||||
| -rw-r--r-- | src/core/hw/lcd.h | 88 |
6 files changed, 192 insertions, 35 deletions
diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp index b7102b874..30318fc06 100644 --- a/src/core/hw/gpu.cpp +++ b/src/core/hw/gpu.cpp | |||
| @@ -15,12 +15,13 @@ | |||
| 15 | #include "core/hle/service/gsp_gpu.h" | 15 | #include "core/hle/service/gsp_gpu.h" |
| 16 | #include "core/hle/service/dsp_dsp.h" | 16 | #include "core/hle/service/dsp_dsp.h" |
| 17 | 17 | ||
| 18 | #include "core/hw/hw.h" | ||
| 18 | #include "core/hw/gpu.h" | 19 | #include "core/hw/gpu.h" |
| 19 | 20 | ||
| 20 | #include "video_core/command_processor.h" | 21 | #include "video_core/command_processor.h" |
| 21 | #include "video_core/utils.h" | 22 | #include "video_core/utils.h" |
| 22 | #include "video_core/video_core.h" | 23 | #include "video_core/video_core.h" |
| 23 | #include <video_core/color.h> | 24 | #include "video_core/color.h" |
| 24 | 25 | ||
| 25 | namespace GPU { | 26 | namespace GPU { |
| 26 | 27 | ||
| @@ -40,7 +41,7 @@ static bool last_skip_frame = false; | |||
| 40 | 41 | ||
| 41 | template <typename T> | 42 | template <typename T> |
| 42 | inline void Read(T &var, const u32 raw_addr) { | 43 | inline void Read(T &var, const u32 raw_addr) { |
| 43 | u32 addr = raw_addr - 0x1EF00000; | 44 | u32 addr = raw_addr - HW::VADDR_GPU; |
| 44 | u32 index = addr / 4; | 45 | u32 index = addr / 4; |
| 45 | 46 | ||
| 46 | // Reads other than u32 are untested, so I'd rather have them abort than silently fail | 47 | // Reads other than u32 are untested, so I'd rather have them abort than silently fail |
| @@ -54,7 +55,7 @@ inline void Read(T &var, const u32 raw_addr) { | |||
| 54 | 55 | ||
| 55 | template <typename T> | 56 | template <typename T> |
| 56 | inline void Write(u32 addr, const T data) { | 57 | inline void Write(u32 addr, const T data) { |
| 57 | addr -= 0x1EF00000; | 58 | addr -= HW::VADDR_GPU; |
| 58 | u32 index = addr / 4; | 59 | u32 index = addr / 4; |
| 59 | 60 | ||
| 60 | // Writes other than u32 are untested, so I'd rather have them abort than silently fail | 61 | // Writes other than u32 are untested, so I'd rather have them abort than silently fail |
| @@ -313,8 +314,6 @@ void Init() { | |||
| 313 | framebuffer_top.address_right2 = 0x182B9800; | 314 | framebuffer_top.address_right2 = 0x182B9800; |
| 314 | framebuffer_sub.address_left1 = 0x1848F000; | 315 | framebuffer_sub.address_left1 = 0x1848F000; |
| 315 | framebuffer_sub.address_left2 = 0x184C7800; | 316 | framebuffer_sub.address_left2 = 0x184C7800; |
| 316 | //framebuffer_sub.address_right1 = unknown; | ||
| 317 | //framebuffer_sub.address_right2 = unknown; | ||
| 318 | 317 | ||
| 319 | framebuffer_top.width = 240; | 318 | framebuffer_top.width = 240; |
| 320 | framebuffer_top.height = 400; | 319 | framebuffer_top.height = 400; |
diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h index 3e81f03ef..5b7f0a4e9 100644 --- a/src/core/hw/gpu.h +++ b/src/core/hw/gpu.h | |||
| @@ -246,6 +246,8 @@ struct Regs { | |||
| 246 | return content[index]; | 246 | return content[index]; |
| 247 | } | 247 | } |
| 248 | 248 | ||
| 249 | #undef ASSERT_MEMBER_SIZE | ||
| 250 | |||
| 249 | private: | 251 | private: |
| 250 | /* | 252 | /* |
| 251 | * Most physical addresses which GPU registers refer to are 8-byte aligned. | 253 | * Most physical addresses which GPU registers refer to are 8-byte aligned. |
diff --git a/src/core/hw/hw.cpp b/src/core/hw/hw.cpp index a63ba6eeb..bed50af50 100644 --- a/src/core/hw/hw.cpp +++ b/src/core/hw/hw.cpp | |||
| @@ -6,43 +6,19 @@ | |||
| 6 | 6 | ||
| 7 | #include "core/hw/hw.h" | 7 | #include "core/hw/hw.h" |
| 8 | #include "core/hw/gpu.h" | 8 | #include "core/hw/gpu.h" |
| 9 | #include "core/hw/lcd.h" | ||
| 9 | 10 | ||
| 10 | namespace HW { | 11 | namespace HW { |
| 11 | 12 | ||
| 12 | enum { | ||
| 13 | VADDR_HASH = 0x1EC01000, | ||
| 14 | VADDR_CSND = 0x1EC03000, | ||
| 15 | VADDR_DSP = 0x1EC40000, | ||
| 16 | VADDR_PDN = 0x1EC41000, | ||
| 17 | VADDR_CODEC = 0x1EC41000, | ||
| 18 | VADDR_SPI = 0x1EC42000, | ||
| 19 | VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM? | ||
| 20 | VADDR_I2C = 0x1EC44000, | ||
| 21 | VADDR_CODEC_2 = 0x1EC45000, | ||
| 22 | VADDR_HID = 0x1EC46000, | ||
| 23 | VADDR_PAD = 0x1EC46000, | ||
| 24 | VADDR_PTM = 0x1EC46000, | ||
| 25 | VADDR_GPIO = 0x1EC47000, | ||
| 26 | VADDR_I2C_2 = 0x1EC48000, | ||
| 27 | VADDR_SPI_3 = 0x1EC60000, | ||
| 28 | VADDR_I2C_3 = 0x1EC61000, | ||
| 29 | VADDR_MIC = 0x1EC62000, | ||
| 30 | VADDR_PXI = 0x1EC63000, // 0xFFFD2000 | ||
| 31 | //VADDR_NTRCARD | ||
| 32 | VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info | ||
| 33 | VADDR_DSP_2 = 0x1ED03000, | ||
| 34 | VADDR_HASH_2 = 0x1EE01000, | ||
| 35 | VADDR_GPU = 0x1EF00000, | ||
| 36 | }; | ||
| 37 | |||
| 38 | template <typename T> | 13 | template <typename T> |
| 39 | inline void Read(T &var, const u32 addr) { | 14 | inline void Read(T &var, const u32 addr) { |
| 40 | switch (addr & 0xFFFFF000) { | 15 | switch (addr & 0xFFFFF000) { |
| 41 | |||
| 42 | case VADDR_GPU: | 16 | case VADDR_GPU: |
| 43 | GPU::Read(var, addr); | 17 | GPU::Read(var, addr); |
| 44 | break; | 18 | break; |
| 45 | 19 | case VADDR_LCD: | |
| 20 | LCD::Write(var, addr); | ||
| 21 | break; | ||
| 46 | default: | 22 | default: |
| 47 | LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); | 23 | LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); |
| 48 | } | 24 | } |
| @@ -51,11 +27,12 @@ inline void Read(T &var, const u32 addr) { | |||
| 51 | template <typename T> | 27 | template <typename T> |
| 52 | inline void Write(u32 addr, const T data) { | 28 | inline void Write(u32 addr, const T data) { |
| 53 | switch (addr & 0xFFFFF000) { | 29 | switch (addr & 0xFFFFF000) { |
| 54 | |||
| 55 | case VADDR_GPU: | 30 | case VADDR_GPU: |
| 56 | GPU::Write(addr, data); | 31 | GPU::Write(addr, data); |
| 57 | break; | 32 | break; |
| 58 | 33 | case VADDR_LCD: | |
| 34 | LCD::Write(addr, data); | ||
| 35 | break; | ||
| 59 | default: | 36 | default: |
| 60 | LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr); | 37 | LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr); |
| 61 | } | 38 | } |
| @@ -80,6 +57,7 @@ void Update() { | |||
| 80 | /// Initialize hardware | 57 | /// Initialize hardware |
| 81 | void Init() { | 58 | void Init() { |
| 82 | GPU::Init(); | 59 | GPU::Init(); |
| 60 | LCD::Init(); | ||
| 83 | LOG_DEBUG(HW, "initialized OK"); | 61 | LOG_DEBUG(HW, "initialized OK"); |
| 84 | } | 62 | } |
| 85 | 63 | ||
diff --git a/src/core/hw/hw.h b/src/core/hw/hw.h index 991c0a07d..d65608910 100644 --- a/src/core/hw/hw.h +++ b/src/core/hw/hw.h | |||
| @@ -8,6 +8,30 @@ | |||
| 8 | 8 | ||
| 9 | namespace HW { | 9 | namespace HW { |
| 10 | 10 | ||
| 11 | /// Beginnings of IO register regions, in the user VA space. | ||
| 12 | enum : u32 { | ||
| 13 | VADDR_HASH = 0x1EC01000, | ||
| 14 | VADDR_CSND = 0x1EC03000, | ||
| 15 | VADDR_DSP = 0x1EC40000, | ||
| 16 | VADDR_PDN = 0x1EC41000, | ||
| 17 | VADDR_CODEC = 0x1EC41000, | ||
| 18 | VADDR_SPI = 0x1EC42000, | ||
| 19 | VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM? | ||
| 20 | VADDR_I2C = 0x1EC44000, | ||
| 21 | VADDR_CODEC_2 = 0x1EC45000, | ||
| 22 | VADDR_HID = 0x1EC46000, | ||
| 23 | VADDR_GPIO = 0x1EC47000, | ||
| 24 | VADDR_I2C_2 = 0x1EC48000, | ||
| 25 | VADDR_SPI_3 = 0x1EC60000, | ||
| 26 | VADDR_I2C_3 = 0x1EC61000, | ||
| 27 | VADDR_MIC = 0x1EC62000, | ||
| 28 | VADDR_PXI = 0x1EC63000, | ||
| 29 | VADDR_LCD = 0x1ED02000, | ||
| 30 | VADDR_DSP_2 = 0x1ED03000, | ||
| 31 | VADDR_HASH_2 = 0x1EE01000, | ||
| 32 | VADDR_GPU = 0x1EF00000, | ||
| 33 | }; | ||
| 34 | |||
| 11 | template <typename T> | 35 | template <typename T> |
| 12 | void Read(T &var, const u32 addr); | 36 | void Read(T &var, const u32 addr); |
| 13 | 37 | ||
diff --git a/src/core/hw/lcd.cpp b/src/core/hw/lcd.cpp new file mode 100644 index 000000000..7986f3ddb --- /dev/null +++ b/src/core/hw/lcd.cpp | |||
| @@ -0,0 +1,66 @@ | |||
| 1 | // Copyright 2015 Citra Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #include "common/common_types.h" | ||
| 6 | |||
| 7 | #include "core/arm/arm_interface.h" | ||
| 8 | #include "core/hle/hle.h" | ||
| 9 | #include "core/hw/hw.h" | ||
| 10 | #include "core/hw/lcd.h" | ||
| 11 | |||
| 12 | namespace LCD { | ||
| 13 | |||
| 14 | Regs g_regs; | ||
| 15 | |||
| 16 | template <typename T> | ||
| 17 | inline void Read(T &var, const u32 raw_addr) { | ||
| 18 | u32 addr = raw_addr - HW::VADDR_LCD; | ||
| 19 | u32 index = addr / 4; | ||
| 20 | |||
| 21 | // Reads other than u32 are untested, so I'd rather have them abort than silently fail | ||
| 22 | if (index >= 0x400 || !std::is_same<T, u32>::value) { | ||
| 23 | LOG_ERROR(HW_LCD, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, addr); | ||
| 24 | return; | ||
| 25 | } | ||
| 26 | |||
| 27 | var = g_regs[index]; | ||
| 28 | } | ||
| 29 | |||
| 30 | template <typename T> | ||
| 31 | inline void Write(u32 addr, const T data) { | ||
| 32 | addr -= HW::VADDR_LCD; | ||
| 33 | u32 index = addr / 4; | ||
| 34 | |||
| 35 | // Writes other than u32 are untested, so I'd rather have them abort than silently fail | ||
| 36 | if (index >= 0x400 || !std::is_same<T, u32>::value) { | ||
| 37 | LOG_ERROR(HW_LCD, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, addr); | ||
| 38 | return; | ||
| 39 | } | ||
| 40 | |||
| 41 | g_regs[index] = static_cast<u32>(data); | ||
| 42 | } | ||
| 43 | |||
| 44 | // Explicitly instantiate template functions because we aren't defining this in the header: | ||
| 45 | |||
| 46 | template void Read<u64>(u64 &var, const u32 addr); | ||
| 47 | template void Read<u32>(u32 &var, const u32 addr); | ||
| 48 | template void Read<u16>(u16 &var, const u32 addr); | ||
| 49 | template void Read<u8>(u8 &var, const u32 addr); | ||
| 50 | |||
| 51 | template void Write<u64>(u32 addr, const u64 data); | ||
| 52 | template void Write<u32>(u32 addr, const u32 data); | ||
| 53 | template void Write<u16>(u32 addr, const u16 data); | ||
| 54 | template void Write<u8>(u32 addr, const u8 data); | ||
| 55 | |||
| 56 | /// Initialize hardware | ||
| 57 | void Init() { | ||
| 58 | LOG_DEBUG(HW_LCD, "initialized OK"); | ||
| 59 | } | ||
| 60 | |||
| 61 | /// Shutdown hardware | ||
| 62 | void Shutdown() { | ||
| 63 | LOG_DEBUG(HW_LCD, "shutdown OK"); | ||
| 64 | } | ||
| 65 | |||
| 66 | } // namespace | ||
diff --git a/src/core/hw/lcd.h b/src/core/hw/lcd.h new file mode 100644 index 000000000..43893a625 --- /dev/null +++ b/src/core/hw/lcd.h | |||
| @@ -0,0 +1,88 @@ | |||
| 1 | // Copyright 2015 Citra Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #pragma once | ||
| 6 | |||
| 7 | #include <cstddef> | ||
| 8 | |||
| 9 | #include "common/common_types.h" | ||
| 10 | #include "common/bit_field.h" | ||
| 11 | |||
| 12 | #define LCD_REG_INDEX(field_name) (offsetof(LCD::Regs, field_name) / sizeof(u32)) | ||
| 13 | |||
| 14 | namespace LCD { | ||
| 15 | |||
| 16 | struct Regs { | ||
| 17 | |||
| 18 | union ColorFill { | ||
| 19 | u32 raw; | ||
| 20 | |||
| 21 | BitField<0, 8, u32> color_r; | ||
| 22 | BitField<8, 8, u32> color_g; | ||
| 23 | BitField<16, 8, u32> color_b; | ||
| 24 | BitField<24, 1, u32> is_enabled; | ||
| 25 | }; | ||
| 26 | |||
| 27 | INSERT_PADDING_WORDS(0x81); | ||
| 28 | ColorFill color_fill_top; | ||
| 29 | INSERT_PADDING_WORDS(0xE); | ||
| 30 | u32 backlight_top; | ||
| 31 | |||
| 32 | INSERT_PADDING_WORDS(0x1F0); | ||
| 33 | |||
| 34 | ColorFill color_fill_bottom; | ||
| 35 | INSERT_PADDING_WORDS(0xE); | ||
| 36 | u32 backlight_bottom; | ||
| 37 | INSERT_PADDING_WORDS(0x16F); | ||
| 38 | |||
| 39 | static inline size_t NumIds() { | ||
| 40 | return sizeof(Regs) / sizeof(u32); | ||
| 41 | } | ||
| 42 | |||
| 43 | u32& operator [] (int index) const { | ||
| 44 | u32* content = (u32*)this; | ||
| 45 | return content[index]; | ||
| 46 | } | ||
| 47 | |||
| 48 | u32& operator [] (int index) { | ||
| 49 | u32* content = (u32*)this; | ||
| 50 | return content[index]; | ||
| 51 | } | ||
| 52 | |||
| 53 | #undef ASSERT_MEMBER_SIZE | ||
| 54 | |||
| 55 | }; | ||
| 56 | static_assert(std::is_standard_layout<Regs>::value, "Structure does not use standard layout"); | ||
| 57 | |||
| 58 | // TODO: MSVC does not support using offsetof() on non-static data members even though this | ||
| 59 | // is technically allowed since C++11. This macro should be enabled once MSVC adds | ||
| 60 | // support for that. | ||
| 61 | #ifndef _MSC_VER | ||
| 62 | #define ASSERT_REG_POSITION(field_name, position) \ | ||
| 63 | static_assert(offsetof(Regs, field_name) == position * 4, \ | ||
| 64 | "Field "#field_name" has invalid position") | ||
| 65 | |||
| 66 | ASSERT_REG_POSITION(color_fill_top, 0x81); | ||
| 67 | ASSERT_REG_POSITION(backlight_top, 0x90); | ||
| 68 | ASSERT_REG_POSITION(color_fill_bottom, 0x281); | ||
| 69 | ASSERT_REG_POSITION(backlight_bottom, 0x290); | ||
| 70 | |||
| 71 | #undef ASSERT_REG_POSITION | ||
| 72 | #endif // !defined(_MSC_VER) | ||
| 73 | |||
| 74 | extern Regs g_regs; | ||
| 75 | |||
| 76 | template <typename T> | ||
| 77 | void Read(T &var, const u32 addr); | ||
| 78 | |||
| 79 | template <typename T> | ||
| 80 | void Write(u32 addr, const T data); | ||
| 81 | |||
| 82 | /// Initialize hardware | ||
| 83 | void Init(); | ||
| 84 | |||
| 85 | /// Shutdown hardware | ||
| 86 | void Shutdown(); | ||
| 87 | |||
| 88 | } // namespace | ||