diff options
| author | 2014-04-26 14:21:40 -0400 | |
|---|---|---|
| committer | 2014-04-26 14:21:40 -0400 | |
| commit | f78794961e2bdcb0314516a3c2409afbfcd6d470 (patch) | |
| tree | c1dffc4ea73a3adf530dcde922c8d83229345599 /src/core/hw/hw.cpp | |
| parent | added simple GSP GPU ReadHWRegs function to support returning the framebuffe... (diff) | |
| download | yuzu-f78794961e2bdcb0314516a3c2409afbfcd6d470.tar.gz yuzu-f78794961e2bdcb0314516a3c2409afbfcd6d470.tar.xz yuzu-f78794961e2bdcb0314516a3c2409afbfcd6d470.zip | |
- changed HW IO map to use virtual addresses
- added hooks to catch LCD IO read/writes
Diffstat (limited to 'src/core/hw/hw.cpp')
| -rw-r--r-- | src/core/hw/hw.cpp | 76 |
1 files changed, 37 insertions, 39 deletions
diff --git a/src/core/hw/hw.cpp b/src/core/hw/hw.cpp index 16bd70125..85669ae7f 100644 --- a/src/core/hw/hw.cpp +++ b/src/core/hw/hw.cpp | |||
| @@ -12,49 +12,42 @@ | |||
| 12 | namespace HW { | 12 | namespace HW { |
| 13 | 13 | ||
| 14 | enum { | 14 | enum { |
| 15 | ADDRESS_CONFIG = 0x10000000, | 15 | VADDR_HASH = 0x1EC01000, |
| 16 | ADDRESS_IRQ = 0x10001000, | 16 | VADDR_CSND = 0x1EC03000, |
| 17 | ADDRESS_NDMA = 0x10002000, | 17 | VADDR_DSP = 0x1EC40000, |
| 18 | ADDRESS_TIMER = 0x10003000, | 18 | VADDR_PDN = 0x1EC41000, |
| 19 | ADDRESS_CTRCARD = 0x10004000, | 19 | VADDR_CODEC = 0x1EC41000, |
| 20 | ADDRESS_CTRCARD_2 = 0x10005000, | 20 | VADDR_SPI = 0x1EC42000, |
| 21 | ADDRESS_SDMC_NAND = 0x10006000, | 21 | VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM? |
| 22 | ADDRESS_SDMC_NAND_2 = 0x10007000, // Apparently not used on retail | 22 | VADDR_I2C = 0x1EC44000, |
| 23 | ADDRESS_PXI = 0x10008000, | 23 | VADDR_CODEC_2 = 0x1EC45000, |
| 24 | ADDRESS_AES = 0x10009000, | 24 | VADDR_HID = 0x1EC46000, |
| 25 | ADDRESS_SHA = 0x1000A000, | 25 | VADDR_PAD = 0x1EC46000, |
| 26 | ADDRESS_RSA = 0x1000B000, | 26 | VADDR_PTM = 0x1EC46000, |
| 27 | ADDRESS_XDMA = 0x1000C000, | 27 | VADDR_GPIO = 0x1EC47000, |
| 28 | ADDRESS_SPICARD = 0x1000D800, | 28 | VADDR_I2C_2 = 0x1EC48000, |
| 29 | ADDRESS_CONFIG_2 = 0x10010000, | 29 | VADDR_SPI_3 = 0x1EC60000, |
| 30 | ADDRESS_HASH = 0x10101000, | 30 | VADDR_I2C_3 = 0x1EC61000, |
| 31 | ADDRESS_CSND = 0x10103000, | 31 | VADDR_MIC = 0x1EC62000, |
| 32 | ADDRESS_DSP = 0x10140000, | 32 | VADDR_PXI = 0x1EC63000, // 0xFFFD2000 |
| 33 | ADDRESS_PDN = 0x10141000, | 33 | //VADDR_NTRCARD |
| 34 | ADDRESS_CODEC = 0x10141000, | 34 | VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info |
| 35 | ADDRESS_SPI = 0x10142000, | 35 | VADDR_DSP_2 = 0x1ED03000, |
| 36 | ADDRESS_SPI_2 = 0x10143000, | 36 | VADDR_HASH_2 = 0x1EE01000, |
| 37 | ADDRESS_I2C = 0x10144000, | 37 | VADDR_LCD = 0x1EF00000, |
| 38 | ADDRESS_CODEC_2 = 0x10145000, | ||
| 39 | ADDRESS_HID = 0x10146000, | ||
| 40 | ADDRESS_PAD = 0x10146000, | ||
| 41 | ADDRESS_PTM = 0x10146000, | ||
| 42 | ADDRESS_I2C_2 = 0x10148000, | ||
| 43 | ADDRESS_SPI_3 = 0x10160000, | ||
| 44 | ADDRESS_I2C_3 = 0x10161000, | ||
| 45 | ADDRESS_MIC = 0x10162000, | ||
| 46 | ADDRESS_PXI_2 = 0x10163000, | ||
| 47 | ADDRESS_NTRCARD = 0x10164000, | ||
| 48 | ADDRESS_DSP_2 = 0x10203000, | ||
| 49 | ADDRESS_HASH_2 = 0x10301000, | ||
| 50 | }; | 38 | }; |
| 51 | 39 | ||
| 52 | template <typename T> | 40 | template <typename T> |
| 53 | inline void Read(T &var, const u32 addr) { | 41 | inline void Read(T &var, const u32 addr) { |
| 54 | switch (addr & 0xFFFFF000) { | 42 | switch (addr & 0xFFFFF000) { |
| 55 | 43 | ||
| 56 | case ADDRESS_NDMA: | 44 | // TODO(bunnei): What is the virtual address of NDMA? |
| 57 | NDMA::Read(var, addr); | 45 | // case VADDR_NDMA: |
| 46 | // NDMA::Read(var, addr); | ||
| 47 | // break; | ||
| 48 | |||
| 49 | case VADDR_LCD: | ||
| 50 | LCD::Read(var, addr); | ||
| 58 | break; | 51 | break; |
| 59 | 52 | ||
| 60 | default: | 53 | default: |
| @@ -66,8 +59,13 @@ template <typename T> | |||
| 66 | inline void Write(u32 addr, const T data) { | 59 | inline void Write(u32 addr, const T data) { |
| 67 | switch (addr & 0xFFFFF000) { | 60 | switch (addr & 0xFFFFF000) { |
| 68 | 61 | ||
| 69 | case ADDRESS_NDMA: | 62 | // TODO(bunnei): What is the virtual address of NDMA? |
| 70 | NDMA::Write(addr, data); | 63 | // case VADDR_NDMA |
| 64 | // NDMA::Write(addr, data); | ||
| 65 | // break; | ||
| 66 | |||
| 67 | case VADDR_LCD: | ||
| 68 | LCD::Write(addr, data); | ||
| 71 | break; | 69 | break; |
| 72 | 70 | ||
| 73 | default: | 71 | default: |