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authorGravatar Subv2015-03-12 13:11:57 -0500
committerGravatar Subv2015-03-16 17:54:06 -0500
commit23b401c3ac6ac1ab9e9cf9ffa9d9a03daa20dfb7 (patch)
tree4cda494f5705d6fb19216b11e4a95e5b99325d38 /src/core/hw/gpu.h
parentGPU: Fixed the bit 25 in the display transfer flags. (diff)
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GPU/DisplayTransfer: Made the scaling bits a single 2bit value
Rephrased some comments.
Diffstat (limited to 'src/core/hw/gpu.h')
-rw-r--r--src/core/hw/gpu.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h
index 3158738f0..d07490db0 100644
--- a/src/core/hw/gpu.h
+++ b/src/core/hw/gpu.h
@@ -188,6 +188,12 @@ struct Regs {
188 BitField<16, 16, u32> input_height; 188 BitField<16, 16, u32> input_height;
189 }; 189 };
190 190
191 enum ScalingMode : u32 {
192 NoScale = 0, // Doesn't scale the image
193 ScaleX = 1, // Downscales the image in half in the X axis and applies a box filter
194 ScaleXY = 2, // Downscales the image in half in both the X and Y axes and applies a box filter
195 };
196
191 union { 197 union {
192 u32 flags; 198 u32 flags;
193 199
@@ -197,8 +203,7 @@ struct Regs {
197 BitField< 8, 3, PixelFormat> input_format; 203 BitField< 8, 3, PixelFormat> input_format;
198 BitField<12, 3, PixelFormat> output_format; 204 BitField<12, 3, PixelFormat> output_format;
199 205
200 BitField<24, 1, u32> scale_x; // Shrinks the image in half horizontally, blending the extra pixels 206 BitField<24, 2, ScalingMode> scaling; // Determines the scaling mode of the transfer
201 BitField<25, 1, u32> scale_xy; // Shrinks the image horizontally and vertically, blending the extra pixels
202 }; 207 };
203 208
204 INSERT_PADDING_WORDS(0x1); 209 INSERT_PADDING_WORDS(0x1);