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| author | 2014-09-14 21:28:44 -0400 | |
|---|---|---|
| committer | 2014-09-14 21:28:44 -0400 | |
| commit | 31d9cf4d17ef9ec4835ea5dc64236087989fbe3a (patch) | |
| tree | 9fc67e151ae3d776a32a69d873b1d57bf5f34c59 /src/core/hw/gpu.cpp | |
| parent | Merge pull request #97 from archshift/cleanup (diff) | |
| parent | Core: Fix warnings in gpu.cpp (diff) | |
| download | yuzu-31d9cf4d17ef9ec4835ea5dc64236087989fbe3a.tar.gz yuzu-31d9cf4d17ef9ec4835ea5dc64236087989fbe3a.tar.xz yuzu-31d9cf4d17ef9ec4835ea5dc64236087989fbe3a.zip | |
Merge pull request #110 from lioncash/warnings
Core: Fix warnings in gpu.cpp
Diffstat (limited to 'src/core/hw/gpu.cpp')
| -rw-r--r-- | src/core/hw/gpu.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp index 2e0943776..7afb00d6c 100644 --- a/src/core/hw/gpu.cpp +++ b/src/core/hw/gpu.cpp | |||
| @@ -49,7 +49,7 @@ inline void Write(u32 addr, const T data) { | |||
| 49 | return; | 49 | return; |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | g_regs[index] = data; | 52 | g_regs[index] = static_cast<u32>(data); |
| 53 | 53 | ||
| 54 | switch (index) { | 54 | switch (index) { |
| 55 | 55 | ||
| @@ -81,9 +81,9 @@ inline void Write(u32 addr, const T data) { | |||
| 81 | u8* source_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalInputAddress())); | 81 | u8* source_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalInputAddress())); |
| 82 | u8* dest_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalOutputAddress())); | 82 | u8* dest_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalOutputAddress())); |
| 83 | 83 | ||
| 84 | for (int y = 0; y < config.output_height; ++y) { | 84 | for (u32 y = 0; y < config.output_height; ++y) { |
| 85 | // TODO: Why does the register seem to hold twice the framebuffer width? | 85 | // TODO: Why does the register seem to hold twice the framebuffer width? |
| 86 | for (int x = 0; x < config.output_width; ++x) { | 86 | for (u32 x = 0; x < config.output_width; ++x) { |
| 87 | struct { | 87 | struct { |
| 88 | int r, g, b, a; | 88 | int r, g, b, a; |
| 89 | } source_color = { 0, 0, 0, 0 }; | 89 | } source_color = { 0, 0, 0, 0 }; |
| @@ -134,10 +134,10 @@ inline void Write(u32 addr, const T data) { | |||
| 134 | } | 134 | } |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | DEBUG_LOG(GPU, "DisplayTriggerTransfer: 0x%08x bytes from 0x%08x(%dx%d)-> 0x%08x(%dx%d), dst format %x", | 137 | DEBUG_LOG(GPU, "DisplayTriggerTransfer: 0x%08x bytes from 0x%08x(%ux%u)-> 0x%08x(%ux%u), dst format %x", |
| 138 | config.output_height * config.output_width * 4, | 138 | config.output_height * config.output_width * 4, |
| 139 | config.GetPhysicalInputAddress(), (int)config.input_width, (int)config.input_height, | 139 | config.GetPhysicalInputAddress(), config.input_width, config.input_height, |
| 140 | config.GetPhysicalOutputAddress(), (int)config.output_width, (int)config.output_height, | 140 | config.GetPhysicalOutputAddress(), config.output_width, config.output_height, |
| 141 | config.output_format.Value()); | 141 | config.output_format.Value()); |
| 142 | } | 142 | } |
| 143 | break; | 143 | break; |