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| author | 2015-12-06 19:06:12 -0800 | |
|---|---|---|
| committer | 2015-12-07 20:20:38 -0800 | |
| commit | 195fedccf07b909c95e5905c7154c595bb260fc7 (patch) | |
| tree | b36ecb555672b6994e4bd11812a605fe2726d172 /src/core/hw/gpu.cpp | |
| parent | VideoCore: Rename HWRasterizer methods to be less confusing (diff) | |
| download | yuzu-195fedccf07b909c95e5905c7154c595bb260fc7.tar.gz yuzu-195fedccf07b909c95e5905c7154c595bb260fc7.tar.xz yuzu-195fedccf07b909c95e5905c7154c595bb260fc7.zip | |
VideoCore: Unify interface to OpenGL and SW rasterizers
This removes explicit checks sprinkled all over the codebase to instead
just have the SW rasterizer expose an implementation with no-ops for
most operations.
Diffstat (limited to 'src/core/hw/gpu.cpp')
| -rw-r--r-- | src/core/hw/gpu.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp index 55e215600..4bd3a632d 100644 --- a/src/core/hw/gpu.cpp +++ b/src/core/hw/gpu.cpp | |||
| @@ -26,7 +26,7 @@ | |||
| 26 | #include "core/tracer/recorder.h" | 26 | #include "core/tracer/recorder.h" |
| 27 | 27 | ||
| 28 | #include "video_core/command_processor.h" | 28 | #include "video_core/command_processor.h" |
| 29 | #include "video_core/hwrasterizer_base.h" | 29 | #include "video_core/rasterizer_interface.h" |
| 30 | #include "video_core/renderer_base.h" | 30 | #include "video_core/renderer_base.h" |
| 31 | #include "video_core/utils.h" | 31 | #include "video_core/utils.h" |
| 32 | #include "video_core/video_core.h" | 32 | #include "video_core/video_core.h" |
| @@ -141,7 +141,7 @@ inline void Write(u32 addr, const T data) { | |||
| 141 | GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC1); | 141 | GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC1); |
| 142 | } | 142 | } |
| 143 | 143 | ||
| 144 | VideoCore::g_renderer->hw_rasterizer->InvalidateRegion(config.GetStartAddress(), config.GetEndAddress() - config.GetStartAddress()); | 144 | VideoCore::g_renderer->rasterizer->InvalidateRegion(config.GetStartAddress(), config.GetEndAddress() - config.GetStartAddress()); |
| 145 | } | 145 | } |
| 146 | 146 | ||
| 147 | // Reset "trigger" flag and set the "finish" flag | 147 | // Reset "trigger" flag and set the "finish" flag |
| @@ -172,7 +172,7 @@ inline void Write(u32 addr, const T data) { | |||
| 172 | u32 output_gap = config.texture_copy.output_gap * 16; | 172 | u32 output_gap = config.texture_copy.output_gap * 16; |
| 173 | 173 | ||
| 174 | size_t contiguous_input_size = config.texture_copy.size / input_width * (input_width + input_gap); | 174 | size_t contiguous_input_size = config.texture_copy.size / input_width * (input_width + input_gap); |
| 175 | VideoCore::g_renderer->hw_rasterizer->FlushRegion(config.GetPhysicalInputAddress(), contiguous_input_size); | 175 | VideoCore::g_renderer->rasterizer->FlushRegion(config.GetPhysicalInputAddress(), contiguous_input_size); |
| 176 | 176 | ||
| 177 | u32 remaining_size = config.texture_copy.size; | 177 | u32 remaining_size = config.texture_copy.size; |
| 178 | u32 remaining_input = input_width; | 178 | u32 remaining_input = input_width; |
| @@ -205,7 +205,7 @@ inline void Write(u32 addr, const T data) { | |||
| 205 | config.flags); | 205 | config.flags); |
| 206 | 206 | ||
| 207 | size_t contiguous_output_size = config.texture_copy.size / output_width * (output_width + output_gap); | 207 | size_t contiguous_output_size = config.texture_copy.size / output_width * (output_width + output_gap); |
| 208 | VideoCore::g_renderer->hw_rasterizer->InvalidateRegion(config.GetPhysicalOutputAddress(), contiguous_output_size); | 208 | VideoCore::g_renderer->rasterizer->InvalidateRegion(config.GetPhysicalOutputAddress(), contiguous_output_size); |
| 209 | 209 | ||
| 210 | GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF); | 210 | GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF); |
| 211 | break; | 211 | break; |
| @@ -232,7 +232,7 @@ inline void Write(u32 addr, const T data) { | |||
| 232 | u32 input_size = config.input_width * config.input_height * GPU::Regs::BytesPerPixel(config.input_format); | 232 | u32 input_size = config.input_width * config.input_height * GPU::Regs::BytesPerPixel(config.input_format); |
| 233 | u32 output_size = output_width * output_height * GPU::Regs::BytesPerPixel(config.output_format); | 233 | u32 output_size = output_width * output_height * GPU::Regs::BytesPerPixel(config.output_format); |
| 234 | 234 | ||
| 235 | VideoCore::g_renderer->hw_rasterizer->FlushRegion(config.GetPhysicalInputAddress(), input_size); | 235 | VideoCore::g_renderer->rasterizer->FlushRegion(config.GetPhysicalInputAddress(), input_size); |
| 236 | 236 | ||
| 237 | for (u32 y = 0; y < output_height; ++y) { | 237 | for (u32 y = 0; y < output_height; ++y) { |
| 238 | for (u32 x = 0; x < output_width; ++x) { | 238 | for (u32 x = 0; x < output_width; ++x) { |
| @@ -339,7 +339,7 @@ inline void Write(u32 addr, const T data) { | |||
| 339 | g_regs.display_transfer_config.trigger = 0; | 339 | g_regs.display_transfer_config.trigger = 0; |
| 340 | GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF); | 340 | GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF); |
| 341 | 341 | ||
| 342 | VideoCore::g_renderer->hw_rasterizer->InvalidateRegion(config.GetPhysicalOutputAddress(), output_size); | 342 | VideoCore::g_renderer->rasterizer->InvalidateRegion(config.GetPhysicalOutputAddress(), output_size); |
| 343 | } | 343 | } |
| 344 | break; | 344 | break; |
| 345 | } | 345 | } |