diff options
| author | 2023-10-24 13:41:48 -0400 | |
|---|---|---|
| committer | 2023-10-25 13:05:56 -0400 | |
| commit | 94b7ac50bb5283caf20989341e27d77ec2c57bef (patch) | |
| tree | 4cc351bd990b5890302b8c5ec64cb4f2e8b92be5 /src/core/hle/service/nvdrv | |
| parent | nvdrv: convert nvmap (diff) | |
| download | yuzu-94b7ac50bb5283caf20989341e27d77ec2c57bef.tar.gz yuzu-94b7ac50bb5283caf20989341e27d77ec2c57bef.tar.xz yuzu-94b7ac50bb5283caf20989341e27d77ec2c57bef.zip | |
nvdrv: fix up remaining copy calls
Diffstat (limited to 'src/core/hle/service/nvdrv')
| -rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp | 20 | ||||
| -rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_gpu.h | 9 | ||||
| -rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp | 10 |
3 files changed, 22 insertions, 17 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp index 3abba25de..2d67acc6a 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp | |||
| @@ -65,7 +65,7 @@ NvResult nvhost_gpu::Ioctl1(DeviceFD fd, Ioctl command, std::span<const u8> inpu | |||
| 65 | case 0x3: | 65 | case 0x3: |
| 66 | return Wrap1(&nvhost_gpu::ChannelSetTimeout, input, output); | 66 | return Wrap1(&nvhost_gpu::ChannelSetTimeout, input, output); |
| 67 | case 0x8: | 67 | case 0x8: |
| 68 | return SubmitGPFIFOBase1(input, output, false); | 68 | return SubmitGPFIFOBase1(input, false); |
| 69 | case 0x9: | 69 | case 0x9: |
| 70 | return Wrap1(&nvhost_gpu::AllocateObjectContext, input, output); | 70 | return Wrap1(&nvhost_gpu::AllocateObjectContext, input, output); |
| 71 | case 0xb: | 71 | case 0xb: |
| @@ -77,7 +77,7 @@ NvResult nvhost_gpu::Ioctl1(DeviceFD fd, Ioctl command, std::span<const u8> inpu | |||
| 77 | case 0x1a: | 77 | case 0x1a: |
| 78 | return Wrap1(&nvhost_gpu::AllocGPFIFOEx2, input, output); | 78 | return Wrap1(&nvhost_gpu::AllocGPFIFOEx2, input, output); |
| 79 | case 0x1b: | 79 | case 0x1b: |
| 80 | return SubmitGPFIFOBase1(input, output, true); | 80 | return SubmitGPFIFOBase1(input, true); |
| 81 | case 0x1d: | 81 | case 0x1d: |
| 82 | return Wrap1(&nvhost_gpu::ChannelSetTimeslice, input, output); | 82 | return Wrap1(&nvhost_gpu::ChannelSetTimeslice, input, output); |
| 83 | default: | 83 | default: |
| @@ -105,7 +105,7 @@ NvResult nvhost_gpu::Ioctl2(DeviceFD fd, Ioctl command, std::span<const u8> inpu | |||
| 105 | case 'H': | 105 | case 'H': |
| 106 | switch (command.cmd) { | 106 | switch (command.cmd) { |
| 107 | case 0x1b: | 107 | case 0x1b: |
| 108 | return SubmitGPFIFOBase2(input, inline_input, output); | 108 | return SubmitGPFIFOBase2(input, inline_input); |
| 109 | } | 109 | } |
| 110 | break; | 110 | break; |
| 111 | } | 111 | } |
| @@ -227,8 +227,7 @@ static boost::container::small_vector<Tegra::CommandHeader, 512> BuildIncrementW | |||
| 227 | return result; | 227 | return result; |
| 228 | } | 228 | } |
| 229 | 229 | ||
| 230 | NvResult nvhost_gpu::SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, std::span<u8> output, | 230 | NvResult nvhost_gpu::SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, Tegra::CommandList&& entries) { |
| 231 | Tegra::CommandList&& entries) { | ||
| 232 | LOG_TRACE(Service_NVDRV, "called, gpfifo={:X}, num_entries={:X}, flags={:X}", params.address, | 231 | LOG_TRACE(Service_NVDRV, "called, gpfifo={:X}, num_entries={:X}, flags={:X}", params.address, |
| 233 | params.num_entries, params.flags.raw); | 232 | params.num_entries, params.flags.raw); |
| 234 | 233 | ||
| @@ -272,8 +271,7 @@ NvResult nvhost_gpu::SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, std::span<u8> o | |||
| 272 | return NvResult::Success; | 271 | return NvResult::Success; |
| 273 | } | 272 | } |
| 274 | 273 | ||
| 275 | NvResult nvhost_gpu::SubmitGPFIFOBase1(std::span<const u8> input, std::span<u8> output, | 274 | NvResult nvhost_gpu::SubmitGPFIFOBase1(std::span<const u8> input, bool kickoff) { |
| 276 | bool kickoff) { | ||
| 277 | if (input.size() < sizeof(IoctlSubmitGpfifo)) { | 275 | if (input.size() < sizeof(IoctlSubmitGpfifo)) { |
| 278 | UNIMPLEMENTED(); | 276 | UNIMPLEMENTED(); |
| 279 | return NvResult::InvalidSize; | 277 | return NvResult::InvalidSize; |
| @@ -290,11 +288,11 @@ NvResult nvhost_gpu::SubmitGPFIFOBase1(std::span<const u8> input, std::span<u8> | |||
| 290 | params.num_entries * sizeof(Tegra::CommandListHeader)); | 288 | params.num_entries * sizeof(Tegra::CommandListHeader)); |
| 291 | } | 289 | } |
| 292 | 290 | ||
| 293 | return SubmitGPFIFOImpl(params, output, std::move(entries)); | 291 | return SubmitGPFIFOImpl(params, std::move(entries)); |
| 294 | } | 292 | } |
| 295 | 293 | ||
| 296 | NvResult nvhost_gpu::SubmitGPFIFOBase2(std::span<const u8> input, std::span<const u8> input_inline, | 294 | NvResult nvhost_gpu::SubmitGPFIFOBase2(std::span<const u8> input, |
| 297 | std::span<u8> output) { | 295 | std::span<const u8> input_inline) { |
| 298 | if (input.size() < sizeof(IoctlSubmitGpfifo)) { | 296 | if (input.size() < sizeof(IoctlSubmitGpfifo)) { |
| 299 | UNIMPLEMENTED(); | 297 | UNIMPLEMENTED(); |
| 300 | return NvResult::InvalidSize; | 298 | return NvResult::InvalidSize; |
| @@ -303,7 +301,7 @@ NvResult nvhost_gpu::SubmitGPFIFOBase2(std::span<const u8> input, std::span<cons | |||
| 303 | std::memcpy(¶ms, input.data(), sizeof(IoctlSubmitGpfifo)); | 301 | std::memcpy(¶ms, input.data(), sizeof(IoctlSubmitGpfifo)); |
| 304 | Tegra::CommandList entries(params.num_entries); | 302 | Tegra::CommandList entries(params.num_entries); |
| 305 | std::memcpy(entries.command_lists.data(), input_inline.data(), input_inline.size()); | 303 | std::memcpy(entries.command_lists.data(), input_inline.data(), input_inline.size()); |
| 306 | return SubmitGPFIFOImpl(params, output, std::move(entries)); | 304 | return SubmitGPFIFOImpl(params, std::move(entries)); |
| 307 | } | 305 | } |
| 308 | 306 | ||
| 309 | NvResult nvhost_gpu::GetWaitbase(IoctlGetWaitbase& params) { | 307 | NvResult nvhost_gpu::GetWaitbase(IoctlGetWaitbase& params) { |
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_gpu.h index fba4232c4..703079a54 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_gpu.h +++ b/src/core/hle/service/nvdrv/devices/nvhost_gpu.h | |||
| @@ -195,12 +195,9 @@ private: | |||
| 195 | NvResult AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params); | 195 | NvResult AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params); |
| 196 | NvResult AllocateObjectContext(IoctlAllocObjCtx& params); | 196 | NvResult AllocateObjectContext(IoctlAllocObjCtx& params); |
| 197 | 197 | ||
| 198 | NvResult SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, std::span<u8> output, | 198 | NvResult SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, Tegra::CommandList&& entries); |
| 199 | Tegra::CommandList&& entries); | 199 | NvResult SubmitGPFIFOBase1(std::span<const u8> input, bool kickoff = false); |
| 200 | NvResult SubmitGPFIFOBase1(std::span<const u8> input, std::span<u8> output, | 200 | NvResult SubmitGPFIFOBase2(std::span<const u8> input, std::span<const u8> input_inline); |
| 201 | bool kickoff = false); | ||
| 202 | NvResult SubmitGPFIFOBase2(std::span<const u8> input, std::span<const u8> input_inline, | ||
| 203 | std::span<u8> output); | ||
| 204 | 201 | ||
| 205 | NvResult GetWaitbase(IoctlGetWaitbase& params); | 202 | NvResult GetWaitbase(IoctlGetWaitbase& params); |
| 206 | NvResult ChannelSetTimeout(IoctlChannelSetTimeout& params); | 203 | NvResult ChannelSetTimeout(IoctlChannelSetTimeout& params); |
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp b/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp index 51659934b..3fdf383f0 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp +++ b/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp | |||
| @@ -29,6 +29,9 @@ std::size_t SliceVectors(std::span<const u8> input, std::vector<T>& dst, std::si | |||
| 29 | return 0; | 29 | return 0; |
| 30 | } | 30 | } |
| 31 | const size_t bytes_copied = count * sizeof(T); | 31 | const size_t bytes_copied = count * sizeof(T); |
| 32 | if (input.size() < offset + bytes_copied) { | ||
| 33 | return 0; | ||
| 34 | } | ||
| 32 | std::memcpy(dst.data(), input.data() + offset, bytes_copied); | 35 | std::memcpy(dst.data(), input.data() + offset, bytes_copied); |
| 33 | return bytes_copied; | 36 | return bytes_copied; |
| 34 | } | 37 | } |
| @@ -41,6 +44,9 @@ std::size_t WriteVectors(std::span<u8> dst, const std::vector<T>& src, std::size | |||
| 41 | return 0; | 44 | return 0; |
| 42 | } | 45 | } |
| 43 | const size_t bytes_copied = src.size() * sizeof(T); | 46 | const size_t bytes_copied = src.size() * sizeof(T); |
| 47 | if (dst.size() < offset + bytes_copied) { | ||
| 48 | return 0; | ||
| 49 | } | ||
| 44 | std::memcpy(dst.data() + offset, src.data(), bytes_copied); | 50 | std::memcpy(dst.data() + offset, src.data(), bytes_copied); |
| 45 | return bytes_copied; | 51 | return bytes_copied; |
| 46 | } | 52 | } |
| @@ -71,6 +77,10 @@ NvResult nvhost_nvdec_common::SetNVMAPfd(IoctlSetNvmapFD& params) { | |||
| 71 | } | 77 | } |
| 72 | 78 | ||
| 73 | NvResult nvhost_nvdec_common::Submit(DeviceFD fd, std::span<const u8> input, std::span<u8> output) { | 79 | NvResult nvhost_nvdec_common::Submit(DeviceFD fd, std::span<const u8> input, std::span<u8> output) { |
| 80 | if (input.size() < sizeof(IoctlSubmit) || output.size() < sizeof(IoctlSubmit)) { | ||
| 81 | UNIMPLEMENTED(); | ||
| 82 | return NvResult::InvalidSize; | ||
| 83 | } | ||
| 74 | IoctlSubmit params{}; | 84 | IoctlSubmit params{}; |
| 75 | std::memcpy(¶ms, input.data(), std::min(input.size(), sizeof(IoctlSubmit))); | 85 | std::memcpy(¶ms, input.data(), std::min(input.size(), sizeof(IoctlSubmit))); |
| 76 | LOG_DEBUG(Service_NVDRV, "called NVDEC Submit, cmd_buffer_count={}", params.cmd_buffer_count); | 86 | LOG_DEBUG(Service_NVDRV, "called NVDEC Submit, cmd_buffer_count={}", params.cmd_buffer_count); |