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| author | 2014-06-01 00:22:40 +0200 | |
|---|---|---|
| committer | 2014-07-23 00:33:08 +0200 | |
| commit | ec9511e1db1f7ff0c2a8f86916937ea5736cdcf6 (patch) | |
| tree | 80ee4beb7fc5a569a40b3e8644a5c51f006b5938 /src/core/hle/service/gsp.cpp | |
| parent | GSP: Implement ReadHWRegs and WriteHWRegs properly. (diff) | |
| download | yuzu-ec9511e1db1f7ff0c2a8f86916937ea5736cdcf6.tar.gz yuzu-ec9511e1db1f7ff0c2a8f86916937ea5736cdcf6.tar.xz yuzu-ec9511e1db1f7ff0c2a8f86916937ea5736cdcf6.zip | |
GSP: HLE GXCommandId::SET_DISPLAY_TRANSFER and GXCommandId::SET_TEXTURE_COPY.
Diffstat (limited to 'src/core/hle/service/gsp.cpp')
| -rw-r--r-- | src/core/hle/service/gsp.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/core/hle/service/gsp.cpp b/src/core/hle/service/gsp.cpp index cc111b0bb..fea521891 100644 --- a/src/core/hle/service/gsp.cpp +++ b/src/core/hle/service/gsp.cpp | |||
| @@ -176,10 +176,17 @@ void TriggerCmdReqQueue(Service::Interface* self) { | |||
| 176 | case GXCommandId::SET_MEMORY_FILL: | 176 | case GXCommandId::SET_MEMORY_FILL: |
| 177 | break; | 177 | break; |
| 178 | 178 | ||
| 179 | // TODO: Check if texture copies are implemented correctly.. | ||
| 179 | case GXCommandId::SET_DISPLAY_TRANSFER: | 180 | case GXCommandId::SET_DISPLAY_TRANSFER: |
| 180 | break; | ||
| 181 | |||
| 182 | case GXCommandId::SET_TEXTURE_COPY: | 181 | case GXCommandId::SET_TEXTURE_COPY: |
| 182 | GPU::Write<u32>(GPU::Registers::DisplayInputBufferAddr, cmd_buff[1] >> 3); | ||
| 183 | GPU::Write<u32>(GPU::Registers::DisplayOutputBufferAddr, cmd_buff[2] >> 3); | ||
| 184 | GPU::Write<u32>(GPU::Registers::DisplayInputBufferSize, cmd_buff[3]); | ||
| 185 | GPU::Write<u32>(GPU::Registers::DisplayOutputBufferSize, cmd_buff[4]); | ||
| 186 | GPU::Write<u32>(GPU::Registers::DisplayTransferFlags, cmd_buff[5]); | ||
| 187 | |||
| 188 | // TODO: GPU::Registers::DisplayTriggerTransfer should be ORed with 1 for texture copies? | ||
| 189 | GPU::Write<u32>(GPU::Registers::DisplayTriggerTransfer, 1); | ||
| 183 | break; | 190 | break; |
| 184 | 191 | ||
| 185 | case GXCommandId::SET_COMMAND_LIST_FIRST: | 192 | case GXCommandId::SET_COMMAND_LIST_FIRST: |