core: Define HAS_NCE macro

5 files changed, 14 insertions, 5 deletions

diff --git a/src/core/hle/kernel/code_set.h b/src/core/hle/kernel/code_set.h
index d53da82f4..4d2d0098e 100644
--- a/src/core/hle/kernel/code_set.h
+++ b/src/core/hle/kernel/code_set.h
@@ -75,6 +75,7 @@ struct CodeSet final {
         return segments[2];
     }
 
+#ifdef HAS_NCE
     Segment& PatchSegment() {
         return patch_segment;
     }
@@ -82,13 +83,17 @@ struct CodeSet final {
     const Segment& PatchSegment() const {
         return patch_segment;
     }
+#endif
 
     /// The overall data that backs this code set.
     Kernel::PhysicalMemory memory;
 
     /// The segments that comprise this code set.
     std::array<Segment, 3> segments;
+
+#ifdef HAS_NCE
     Segment patch_segment;
+#endif
 
     /// The entry point address for this code set.
     KProcessAddress entrypoint = 0;
diff --git a/src/core/hle/kernel/k_address_space_info.cpp b/src/core/hle/kernel/k_address_space_info.cpp
index 3235a7a37..23258071e 100644
--- a/src/core/hle/kernel/k_address_space_info.cpp
+++ b/src/core/hle/kernel/k_address_space_info.cpp
@@ -25,7 +25,7 @@ constexpr std::array<KAddressSpaceInfo, 13> AddressSpaceInfos{{
    { .bit_width = 36, .address = 2_GiB       , .size = 64_GiB  - 2_GiB  , .type = KAddressSpaceInfo::Type::MapLarge, },
    { .bit_width = 36, .address = Size_Invalid, .size = 8_GiB            , .type = KAddressSpaceInfo::Type::Heap,     },
    { .bit_width = 36, .address = Size_Invalid, .size = 6_GiB            , .type = KAddressSpaceInfo::Type::Alias,    },
-#ifdef ARCHITECTURE_arm64
+#ifdef HAS_NCE
    // With NCE, we use a 38-bit address space due to memory limitations. This should (safely) truncate ASLR region.
    { .bit_width = 39, .address = 128_MiB     , .size = 256_GiB - 128_MiB, .type = KAddressSpaceInfo::Type::Map39Bit, },
 #else
diff --git a/src/core/hle/kernel/k_page_table_base.cpp b/src/core/hle/kernel/k_page_table_base.cpp
index f7f1e8a3b..2b5e77ccf 100644
--- a/src/core/hle/kernel/k_page_table_base.cpp
+++ b/src/core/hle/kernel/k_page_table_base.cpp
@@ -96,7 +96,7 @@ constexpr Common::MemoryPermission ConvertToMemoryPermission(KMemoryPermission p
     if (True(perm & KMemoryPermission::UserWrite)) {
         perms |= Common::MemoryPermission::Write;
     }
-#ifdef ARCHITECTURE_arm64
+#ifdef HAS_NCE
     if (True(perm & KMemoryPermission::UserExecute)) {
         perms |= Common::MemoryPermission::Execute;
     }
diff --git a/src/core/hle/kernel/k_process.h b/src/core/hle/kernel/k_process.h
index e5f796ac7..d8cd0fdde 100644
--- a/src/core/hle/kernel/k_process.h
+++ b/src/core/hle/kernel/k_process.h
@@ -112,7 +112,6 @@ private:
     std::array<KThread*, Core::Hardware::NUM_CPU_CORES> m_pinned_threads{};
     std::array<DebugWatchpoint, Core::Hardware::NUM_WATCHPOINTS> m_watchpoints{};
     std::map<KProcessAddress, u64> m_debug_page_refcounts{};
-    std::unordered_map<u64, u64> m_post_handlers{};
     std::atomic<s64> m_cpu_time{};
     std::atomic<s64> m_num_process_switches{};
     std::atomic<s64> m_num_thread_switches{};
@@ -121,6 +120,9 @@ private:
     std::atomic<s64> m_num_ipc_messages{};
     std::atomic<s64> m_num_ipc_replies{};
     std::atomic<s64> m_num_ipc_receives{};
+#ifdef HAS_NCE
+    std::unordered_map<u64, u64> m_post_handlers{};
+#endif
 
 private:
     Result StartTermination();
@@ -468,9 +470,11 @@ public:
 
     static void Switch(KProcess* cur_process, KProcess* next_process);
 
+#ifdef HAS_NCE
     std::unordered_map<u64, u64>& GetPostHandlers() noexcept {
         return m_post_handlers;
     }
+#endif
 
 public:
     // Attempts to insert a watchpoint into a free slot. Returns false if none are available.
diff --git a/src/core/hle/kernel/physical_core.cpp b/src/core/hle/kernel/physical_core.cpp
index 15434212e..073039825 100644
--- a/src/core/hle/kernel/physical_core.cpp
+++ b/src/core/hle/kernel/physical_core.cpp
@@ -4,7 +4,7 @@
 #include "common/settings.h"
 #include "core/arm/dynarmic/arm_dynarmic_32.h"
 #include "core/arm/dynarmic/arm_dynarmic_64.h"
-#ifdef ARCHITECTURE_arm64
+#ifdef HAS_NCE
 #include "core/arm/nce/arm_nce.h"
 #endif
 #include "core/core.h"
@@ -33,7 +33,7 @@ PhysicalCore::PhysicalCore(std::size_t core_index, Core::System& system, KSchedu
 PhysicalCore::~PhysicalCore() = default;
 
 void PhysicalCore::Initialize(bool is_64_bit) {
-#if defined(ARCHITECTURE_arm64)
+#if defined(HAS_NCE)
     if (Settings::IsNceEnabled()) {
         m_arm_interface = std::make_unique<Core::ARM_NCE>(m_system, m_system.Kernel().IsMulticore(),
                                                           m_core_index);